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commit 95fcc286a29b904a374c9330d21873465777d94e Author: chao an <[email protected]> AuthorDate: Tue Jan 16 09:45:35 2024 +0800 risc-v/toolchain: configurable vendor ISA extensions This option allows the platform to enable some vendor-customized ISA extensions, E.g OpenHW, SiFive, T-Head. SiFive Intelligence Extensions: SiFive Vector Coprocessor Interface(VCIX): xsfvcp SiFive FP32-to-int8 Ranged Clip Instructions: Xsfvfnrclipxfqf SiFive Matrix Multiply Accumulate Instructions: Xsfvfwmaccqqq SiFive Int8 Matrix Multiplication Instructions: XSFvqmaccqoq Command Line: xsfvcp0p1_xsfvfnrclipxfqf0p1_xsfvfwmaccqqq0p1_xsfvqmaccqoq0p1 Signed-off-by: chao an <[email protected]> --- arch/risc-v/Kconfig | 15 +++++++++++++++ arch/risc-v/src/common/Toolchain.defs | 5 +++++ 2 files changed, 20 insertions(+) diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index f2f908857d..f6ed350092 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -297,6 +297,21 @@ config ARCH_RV_ISA_ZICSR_ZIFENCEI clang < 17 or GCC < 11.3.0, for which this is not possible or need special treatment. +config ARCH_RV_ISA_VENDOR_EXTENSIONS + string "Vendor Custom RISC-V Instruction Set Architecture Extensions" + default "" + ---help--- + This option allows the platform to enable some vendor-customized ISA extensions, + E.g OpenHW, SiFive, T-Head. + + SiFive Intelligence Extensions: + SiFive Vector Coprocessor Interface(VCIX): xsfvcp + SiFive FP32-to-int8 Ranged Clip Instructions: Xsfvfnrclipxfqf + SiFive Matrix Multiply Accumulate Instructions: Xsfvfwmaccqqq + SiFive Int8 Matrix Multiplication Instructions: XSFvqmaccqoq + Command Line: + xsfvcp0p1_xsfvfnrclipxfqf0p1_xsfvfwmaccqqq0p1_xsfvqmaccqoq0p1 + config ARCH_RV_MMIO_BITS int # special cases diff --git a/arch/risc-v/src/common/Toolchain.defs b/arch/risc-v/src/common/Toolchain.defs index b3241c2c14..94462b07c1 100644 --- a/arch/risc-v/src/common/Toolchain.defs +++ b/arch/risc-v/src/common/Toolchain.defs @@ -194,6 +194,11 @@ ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVG) endif endif + ARCH_RV_ISA_VENDOR_EXTENSIONS = $(strip $(subst ",,$(CONFIG_ARCH_RV_ISA_VENDOR_EXTENSIONS))) + ifneq ($(ARCH_RV_ISA_VENDOR_EXTENSIONS),) + ARCHCPUEXTFLAGS := $(ARCHCPUEXTFLAGS)_$(ARCH_RV_ISA_VENDOR_EXTENSIONS) + endif + # Detect abi type ifeq ($(CONFIG_ARCH_RV32),y)
