yamt commented on code in PR #12165:
URL: https://github.com/apache/nuttx/pull/12165#discussion_r1606289853
##########
arch/xtensa/src/esp32s3/esp32s3_start.c:
##########
@@ -447,55 +488,155 @@ static inline uint32_t calc_mmu_pages(uint32_t size,
uint32_t vaddr)
*
****************************************************************************/
-#ifdef CONFIG_ESP32S3_APP_FORMAT_MCUBOOT
-static int map_rom_segments(void)
+#if defined(CONFIG_ESP32S3_APP_FORMAT_MCUBOOT) || \
+ defined(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+static int map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
+ uint32_t app_drom_size, uint32_t app_irom_start,
+ uint32_t app_irom_vaddr, uint32_t app_irom_size)
{
uint32_t rc = 0;
- uint32_t regval;
- uint32_t drom_lma_aligned;
- uint32_t drom_vma_aligned;
- uint32_t drom_page_count;
- uint32_t irom_lma_aligned;
- uint32_t irom_vma_aligned;
- uint32_t irom_page_count;
+ uint32_t actual_mapped_len = 0;
+ uint32_t app_irom_start_aligned = app_irom_start & MMU_FLASH_MASK;
+ uint32_t app_irom_vaddr_aligned = app_irom_vaddr & MMU_FLASH_MASK;
+ uint32_t app_drom_start_aligned = app_drom_start & MMU_FLASH_MASK;
+ uint32_t app_drom_vaddr_aligned = app_drom_vaddr & MMU_FLASH_MASK;
+
+#ifdef CONFIG_ESPRESSIF_SIMPLE_BOOT
+ esp_image_header_t image_header; /* Header for entire image */
+ esp_image_segment_header_t WORD_ALIGNED_ATTR segment_hdr;
+ bool padding_checksum = false;
+ unsigned int segments = 0;
+ unsigned int ram_segments = 0;
+ unsigned int rom_segments = 0;
+ size_t offset = CONFIG_BOOTLOADER_OFFSET_IN_FLASH;
+
+ /* Read image header */
+
+ if (bootloader_flash_read(offset, &image_header,
+ sizeof(esp_image_header_t),
+ true) != ESP_OK)
+ {
+ ets_printf("Failed to load image header!\n");
+ abort();
+ }
- size_t partition_offset = PRIMARY_SLOT_OFFSET;
- uint32_t app_irom_lma = partition_offset + (uint32_t)_image_irom_lma;
- uint32_t app_irom_size = (uint32_t)_image_irom_size;
- uint32_t app_irom_vma = (uint32_t)_image_irom_vma;
- uint32_t app_drom_lma = partition_offset + (uint32_t)_image_drom_lma;
- uint32_t app_drom_size = (uint32_t)_image_drom_size;
- uint32_t app_drom_vma = (uint32_t)_image_drom_vma;
-
- uint32_t autoload = cache_suspend_dcache();
- cache_invalidate_dcache_all();
+ offset += sizeof(esp_image_header_t);
- /* Clear the MMU entries that are already set up, so the new app only has
- * the mappings it creates.
- */
+ /* Iterate for segment information parsing */
+
+ while (segments++ < 16 && rom_segments < 2)
+ {
+ /* Read segment header */
+
+ if (bootloader_flash_read(offset, &segment_hdr,
+ sizeof(esp_image_segment_header_t),
+ true) != ESP_OK)
+ {
+ ets_printf("failed to read segment header at %x\n", offset);
+ abort();
+ }
+
+ if (IS_NONE(segment_hdr.load_addr))
+ {
+ break;
+ }
+
+ if (IS_RTC_FAST_IRAM(segment_hdr.load_addr) ||
+ IS_RTC_FAST_DRAM(segment_hdr.load_addr) ||
+ IS_RTC_SLOW_DRAM(segment_hdr.load_addr))
+ {
+ /* RTC segment is loaded by ROM bootloader */
+
+ ram_segments++;
+ }
+
+ ets_printf("%s: lma 0x%08x vma 0x%08x len 0x%-6x (%u)\n",
+ IS_NONE(segment_hdr.load_addr) ? "???" :
+ IS_RTC_FAST_IRAM(segment_hdr.load_addr) ||
+ IS_RTC_FAST_DRAM(segment_hdr.load_addr) ||
+ IS_RTC_SLOW_DRAM(segment_hdr.load_addr) ? "rtc" :
+ IS_MMAP(segment_hdr.load_addr) ?
+ IS_IROM(segment_hdr.load_addr) ? "imap" : "dmap" :
+ IS_PADD(segment_hdr.load_addr) ? "padd" :
+ IS_DRAM(segment_hdr.load_addr) ? "dram" : "iram",
+ offset + sizeof(esp_image_segment_header_t),
+ segment_hdr.load_addr, segment_hdr.data_len,
+ segment_hdr.data_len);
+
+ /* Fix drom and irom produced be the linker, as this
+ * is later invalidated by the elf2image command.
+ */
+
+ if (IS_DROM(segment_hdr.load_addr) &&
+ segment_hdr.load_addr == (uint32_t)_image_drom_vma)
+ {
+ app_drom_start = offset + sizeof(esp_image_segment_header_t);
+ app_drom_start_aligned = app_drom_start & MMU_FLASH_MASK;
+ rom_segments++;
+ }
+
+ if (IS_IROM(segment_hdr.load_addr) &&
+ segment_hdr.load_addr == (uint32_t)_image_irom_vma)
+ {
+ app_irom_start = offset + sizeof(esp_image_segment_header_t);
+ app_irom_start_aligned = app_irom_start & MMU_FLASH_MASK;
+ rom_segments++;
+ }
+
+ if (IS_SRAM(segment_hdr.load_addr))
+ {
+ ram_segments++;
+ }
+
+ offset += sizeof(esp_image_segment_header_t) + segment_hdr.data_len;
+ if (ram_segments == image_header.segment_count && !padding_checksum)
+ {
+ offset += (CHECKSUM_ALIGN - 1) - (offset % CHECKSUM_ALIGN) + 1;
+ padding_checksum = true;
+ }
+ }
- for (size_t i = 0; i < FLASH_MMU_TABLE_SIZE; i++)
+ if (segments == 0 || segments == 16)
{
- FLASH_MMU_TABLE[i] = MMU_TABLE_INVALID_VAL;
+ ets_printf("Error parsing segments\n");
}
- drom_lma_aligned = app_drom_lma & MMU_FLASH_MASK;
- drom_vma_aligned = app_drom_vma & MMU_FLASH_MASK;
- drom_page_count = calc_mmu_pages(app_drom_size, app_drom_vma);
- rc = cache_dbus_mmu_set(MMU_ACCESS_FLASH, drom_vma_aligned,
- drom_lma_aligned, 64, drom_page_count, 0);
+ ets_printf("total segments stored %d\n", segments - 1);
+#endif
+
+ cache_hal_disable(CACHE_TYPE_ALL);
+
+ /* Clear the MMU entries that are already set up,
+ * so the new app only has the mappings it creates.
+ */
- irom_lma_aligned = app_irom_lma & MMU_FLASH_MASK;
- irom_vma_aligned = app_irom_vma & MMU_FLASH_MASK;
- irom_page_count = calc_mmu_pages(app_irom_size, app_irom_vma);
- rc = cache_ibus_mmu_set(MMU_ACCESS_FLASH, irom_vma_aligned,
- irom_lma_aligned, 64, irom_page_count, 0);
+ mmu_hal_unmap_all();
- regval = getreg32(EXTMEM_DCACHE_CTRL1_REG);
- regval &= EXTMEM_DCACHE_SHUT_CORE0_BUS;
- putreg32(regval, EXTMEM_DCACHE_CTRL1_REG);
+ mmu_hal_map_region(0, MMU_TARGET_FLASH0,
+ app_drom_vaddr_aligned, app_drom_start_aligned,
+ app_drom_size, &actual_mapped_len);
- cache_resume_dcache(autoload);
+ mmu_hal_map_region(0, MMU_TARGET_FLASH0,
+ app_irom_vaddr_aligned, app_irom_start_aligned,
+ app_irom_size, &actual_mapped_len);
+
+ /* ------------------Enable corresponding buses--------------------- */
+
+ cache_bus_mask_t bus_mask = cache_ll_l1_get_bus(0, app_drom_vaddr_aligned,
+ app_drom_size);
+ cache_ll_l1_enable_bus(0, bus_mask);
+ bus_mask = cache_ll_l1_get_bus(0, app_irom_vaddr_aligned, app_irom_size);
+ cache_ll_l1_enable_bus(0, bus_mask);
+#if CONFIG_ESPRESSIF_NUM_CPUS > 1
+ bus_mask = cache_ll_l1_get_bus(1, app_drom_vaddr_aligned, app_drom_size);
+ cache_ll_l1_enable_bus(1, bus_mask);
+ bus_mask = cache_ll_l1_get_bus(1, app_irom_vaddr_aligned, app_irom_size);
+ cache_ll_l1_enable_bus(1, bus_mask);
+#endif
+
+ /* ------------------Enable Cache----------------------------------- */
+
+ cache_hal_enable(CACHE_TYPE_ALL);
Review Comment:
ok. thank you.
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