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commit c06a742a636c33199bc2284780f244dae5ada545 Author: YAMAMOTO Takashi <[email protected]> AuthorDate: Wed Aug 28 21:26:38 2024 +0900 esp32: fix a crash with PSRAM + SMP this function is called via esp_spiram_init_cache early in the boot. --- arch/xtensa/src/esp32/esp32_spiram.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/xtensa/src/esp32/esp32_spiram.c b/arch/xtensa/src/esp32/esp32_spiram.c index 8eeb80b8c9..eed50e1fff 100644 --- a/arch/xtensa/src/esp32/esp32_spiram.c +++ b/arch/xtensa/src/esp32/esp32_spiram.c @@ -93,8 +93,8 @@ unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, uint32_t regval; #ifdef CONFIG_SMP int cpu_to_stop = 0; - bool smp_start = OSINIT_OS_READY(); #endif + const bool os_ready = OSINIT_OS_READY(); unsigned int i; unsigned int shift; unsigned int mask_s; @@ -176,14 +176,18 @@ unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, * the flash guards to make sure the cache is disabled. */ - flags = enter_critical_section(); + flags = 0; /* suppress GCC warning */ + if (os_ready) + { + flags = enter_critical_section(); + } #ifdef CONFIG_SMP /* The other CPU might be accessing the cache at the same time, just by * using variables in external RAM. */ - if (smp_start) + if (os_ready) { cpu_to_stop = up_cpu_index() == 1 ? 0 : 1; up_cpu_pause(cpu_to_stop); @@ -222,13 +226,17 @@ unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, #ifdef CONFIG_SMP spi_enable_cache(1); - if (smp_start) + if (os_ready) { up_cpu_resume(cpu_to_stop); } #endif - leave_critical_section(flags); + if (os_ready) + { + leave_critical_section(flags); + } + return 0; }
