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commit 9a317472fd37b0ed5a728304c682ee74bb39a99a Author: ligd <[email protected]> AuthorDate: Fri Sep 27 18:48:47 2024 +0800 arm-m: support zero interrupt back to game Signed-off-by: ligd <[email protected]> --- arch/arm/src/armv6-m/arm_doirq.c | 23 +++++++++++++++-------- arch/arm/src/armv7-m/arm_doirq.c | 23 +++++++++++++++-------- arch/arm/src/armv8-m/arm_doirq.c | 22 ++++++++++++++-------- arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c | 2 ++ arch/arm/src/mps/mps_irq.c | 2 ++ arch/arm/src/nrf52/nrf52_irq.c | 2 ++ arch/arm/src/stm32/stm32_irq.c | 2 ++ arch/arm/src/stm32l4/stm32l4_irq.c | 2 ++ 8 files changed, 54 insertions(+), 24 deletions(-) diff --git a/arch/arm/src/armv6-m/arm_doirq.c b/arch/arm/src/armv6-m/arm_doirq.c index b9683a5708..fea1620bd2 100644 --- a/arch/arm/src/armv6-m/arm_doirq.c +++ b/arch/arm/src/armv6-m/arm_doirq.c @@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) arm_ack_irq(irq); + /* Set current regs for crash dump */ + + up_set_current_regs(regs); + if (irq == NVIC_IRQ_PENDSV) { +#ifdef CONFIG_ARCH_HIPRI_INTERRUPT + /* Dispatch the PendSV interrupt */ + + irq_dispatch(irq, regs); +#endif + up_irq_save(); g_running_tasks[this_cpu()]->xcp.regs = regs; } else { - /* Set current regs for crash dump */ - - up_set_current_regs(regs); - /* Dispatch irq */ tcb->xcp.regs = regs; irq_dispatch(irq, regs); - - /* Clear current regs */ - - up_set_current_regs(NULL); } /* If a context switch occurred while processing the interrupt then @@ -110,6 +112,11 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) regs = tcb->xcp.regs; #endif + /* Clear current regs */ + + up_set_current_regs(NULL); + board_autoled_off(LED_INIRQ); + return regs; } diff --git a/arch/arm/src/armv7-m/arm_doirq.c b/arch/arm/src/armv7-m/arm_doirq.c index 2f532969a5..a14b24e6a4 100644 --- a/arch/arm/src/armv7-m/arm_doirq.c +++ b/arch/arm/src/armv7-m/arm_doirq.c @@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) arm_ack_irq(irq); + /* Set current regs for crash dump */ + + up_set_current_regs(regs); + if (irq == NVIC_IRQ_PENDSV) { +#ifdef CONFIG_ARCH_HIPRI_INTERRUPT + /* Dispatch the PendSV interrupt */ + + irq_dispatch(irq, regs); +#endif + up_irq_save(); g_running_tasks[this_cpu()]->xcp.regs = regs; } else { - /* Set current regs for crash dump */ - - up_set_current_regs(regs); - /* Dispatch irq */ tcb->xcp.regs = regs; irq_dispatch(irq, regs); - - /* Clear current regs */ - - up_set_current_regs(NULL); } /* If a context switch occurred while processing the interrupt then @@ -110,6 +112,11 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) regs = tcb->xcp.regs; #endif + /* Clear current regs */ + + up_set_current_regs(NULL); + board_autoled_off(LED_INIRQ); + return regs; } diff --git a/arch/arm/src/armv8-m/arm_doirq.c b/arch/arm/src/armv8-m/arm_doirq.c index d024d1ebad..0f3fad50bb 100644 --- a/arch/arm/src/armv8-m/arm_doirq.c +++ b/arch/arm/src/armv8-m/arm_doirq.c @@ -67,25 +67,27 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) arm_ack_irq(irq); + /* Set current regs for crash dump */ + + up_set_current_regs(regs); + if (irq == NVIC_IRQ_PENDSV) { +#ifdef CONFIG_ARCH_HIPRI_INTERRUPT + /* Dispatch the PendSV interrupt */ + + irq_dispatch(irq, regs); +#endif + up_irq_save(); g_running_tasks[this_cpu()]->xcp.regs = regs; } else { - /* Set current regs for crash dump */ - - up_set_current_regs(regs); - /* Dispatch irq */ tcb->xcp.regs = regs; irq_dispatch(irq, regs); - - /* Clear current regs */ - - up_set_current_regs(NULL); } /* If a context switch occurred while processing the interrupt then @@ -110,6 +112,10 @@ uint32_t *arm_doirq(int irq, uint32_t *regs) regs = tcb->xcp.regs; #endif + /* Clear current regs */ + + up_set_current_regs(NULL); + board_autoled_off(LED_INIRQ); #ifdef CONFIG_ARMV8M_TRUSTZONE_HYBRID diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c index d0f1316568..7c971c81fb 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_irq.c @@ -137,9 +137,11 @@ static int lpc17_40_nmi(int irq, void *context, void *arg) static int lpc17_40_pendsv(int irq, void *context, void *arg) { +#ifndef CONFIG_ARCH_HIPRI_INTERRUPT up_irq_save(); _err("PANIC!!! PendSV received\n"); PANIC(); +#endif return 0; } diff --git a/arch/arm/src/mps/mps_irq.c b/arch/arm/src/mps/mps_irq.c index 6e9af56347..f5a98b709a 100644 --- a/arch/arm/src/mps/mps_irq.c +++ b/arch/arm/src/mps/mps_irq.c @@ -61,9 +61,11 @@ static int mps_nmi(int irq, void *context, void *arg) static int mps_pendsv(int irq, void *context, void *arg) { +#ifndef CONFIG_ARCH_HIPRI_INTERRUPT up_irq_save(); _err("PANIC!!! PendSV received\n"); PANIC(); +#endif return 0; } diff --git a/arch/arm/src/nrf52/nrf52_irq.c b/arch/arm/src/nrf52/nrf52_irq.c index 7c400bbf9c..2e916afc72 100644 --- a/arch/arm/src/nrf52/nrf52_irq.c +++ b/arch/arm/src/nrf52/nrf52_irq.c @@ -143,9 +143,11 @@ static int nrf52_nmi(int irq, void *context, void *arg) static int nrf52_pendsv(int irq, void *context, void *arg) { +#ifndef CONFIG_ARCH_HIPRI_INTERRUPT up_irq_save(); _err("PANIC!!! PendSV received\n"); PANIC(); +#endif return 0; } diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index 99374e5db7..7a63323a37 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -148,9 +148,11 @@ static int stm32_nmi(int irq, void *context, void *arg) static int stm32_pendsv(int irq, void *context, void *arg) { +#ifndef CONFIG_ARCH_HIPRI_INTERRUPT up_irq_save(); _err("PANIC!!! PendSV received\n"); PANIC(); +#endif return 0; } diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c index e8c0031550..8499204741 100644 --- a/arch/arm/src/stm32l4/stm32l4_irq.c +++ b/arch/arm/src/stm32l4/stm32l4_irq.c @@ -145,9 +145,11 @@ static int stm32l4_nmi(int irq, void *context, void *arg) static int stm32l4_pendsv(int irq, void *context, void *arg) { +#ifndef CONFIG_ARCH_HIPRI_INTERRUPT up_irq_save(); _err("PANIC!!! PendSV received\n"); PANIC(); +#endif return 0; }
