chirping78 commented on PR #14465:
URL: https://github.com/apache/nuttx/pull/14465#issuecomment-2476403424
Using JTAG to single step through the `nxsem_wait` function, it shows that
it's not an alignment issue, but the `s32c1i` instruction caused the exception.
```
0x400f0468 <+196>: or a14, a13, a9
0x400f046b <+199>: or a8, a9, a9
0x400f046e <+202>: wsr.scompare1 a14
=> 0x400f0471 <+205>: s32c1i a8, a12, 0
0x400f0474 <+208>: beq a8, a14, 0x400f0480 <nxsem_wait+220>
0x400f0477 <+211>: or a14, a9, a9
0x400f047a <+214>: and a9, a8, a11
0x400f047d <+217>: bne a14, a9, 0x400f0468 <nxsem_wait+196>
```
At this point, the register values are as expection:
```
(gdb) p/x $a14
$3 = 0x40001
(gdb) p/x $a12
$4 = 0x40085fd0
(gdb) p/x $a8
$5 = 0x40000
```
The sem value is `1`, and here the code wants to write `0` to it.
But the problem might be that the iram is not compatiable with `s32c1i`
instruction.
@tmedicci you may need to check this with the IC designer.
It this is the case, one solution might be:
- in `esp32_iramheap_initialize`, not directly use `mm_initialize`, since
`mm_initialize` will put the memory manager struct to the memory header, i.e. a
sem will be in iram;
- but allocate the memory manager struct from another data heap, such as
`Umem`, then use that memory manager struct to manage iram heap.
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org
For queries about this service, please contact Infrastructure at:
us...@infra.apache.org
