yamt commented on PR #14465: URL: https://github.com/apache/nuttx/pull/14465#issuecomment-2478034941
> > But the problem might be that the iram is not compatiable with `s32c1i` instruction. @tmedicci you may need to check this with the IC designer. > > @tmedicci Found this statement in "Xtensa ® LX7 MicroprocessorData Book" > > ``` > S32C1I instructions may target cached, cache-bypass, and data RAM memory locations. > S32C1I instructions are not permitted to access memory addresses in data ROM, > instruction memory or the address region allocated to the XLMI port. Attempts to direct > the S32C1I at these addresses will cause an exception. > ``` depending on how the instruction is actually used, it might or might not easy to implement enough emulation in the trap handler. it might be difficult if the same memory can be modified with non-trapping instruction (s32i) as well. maybe someone needs to make a feasibility studf by reading the disassembly of the relevant code. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org
