tmedicci commented on PR #14672: URL: https://github.com/apache/nuttx/pull/14672#issuecomment-2555291539
> > Will try locally on ESP32-S2 to see whether can reproduce the issue @tmedicci > > Update: have found the reason. ESP32-S2 is not like ESP32 and ESP32-S3, the former has `XCHAL_HAVE_LOOPS=0` in it's chip configuration, while the later have `XCHAL_HAVE_LOOPS=1`. > > This difference triggered an error in a code path that have not been tested. Will fix it and update the patch. > > Thanks, I'll trigger the CI again... I had to rebase your changes to ensure that our internal CI would pass. It passed! In addition to that, I applied the following patch: ``` diff --git a/arch/xtensa/src/common/xtensa_int_handlers.S b/arch/xtensa/src/common/xtensa_int_handlers.S index c63848d66c..c6328d5a03 100644 --- a/arch/xtensa/src/common/xtensa_int_handlers.S +++ b/arch/xtensa/src/common/xtensa_int_handlers.S @@ -193,13 +193,6 @@ _xtensa_level1_handler: call0 _xtensa_context_save - /* Overwrite the PS saved by the exception entry. */ - - movi a2, ~PS_EXCM_MASK - l32i a3, sp, (4 * REG_PS) - and a3, a3, a2 - s32i a3, sp, (4 * REG_PS) - /* Save current SP before (possibly) overwriting it, it's the register save * area. This value will be used later by dispatch_c_isr to retrieve the * register save area. ``` I removed the clearing of the PS.EXCM in the stack and the results of the CI were the same! -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: commits-unsubscr...@nuttx.apache.org For queries about this service, please contact Infrastructure at: us...@infra.apache.org