jlaitine commented on PR #15938:
URL: https://github.com/apache/nuttx/pull/15938#issuecomment-2703630963

   
   > Regarding the problem you described, the original implementation of 
aligning the tick scale also has this problem. Let's take an example. Assume 
that the frequency is `62500000`, `USEC_PER_TICK = 10`, `cycle_per_tick = 625`.
   > 
   > tick |--------------------|-----------t0---t1--| 
tick5662--------------5663---------------5664
   > 
   > let `t_0 = 3539791 (625 * 5663 + 416)` be the time when we call 
`sleep(1tick)`. let `t_1 = 3539876 (625 * 5664 - 124)` be the time when we call 
arm64_tick_start(1tick).
   > 
   > We calculate the next expiration cycle via: `arm64_arch_timer_count() / 
priv->cycle_per_tick * priv->cycle_per_tick +ticks * priv->cycle_per_tick` That 
is: `3539876 / 625 * 625 + 1 * 625 = 3540000` (exact tick 5664). The time 
difference between next expiration time and `t0` is `3540000 - 3539791 = 209`. 
This makes us only sleep for `209` cycles to trigger the timer, instead of at 
least 625 cycles to trigger the timer, causing the timer fired prematurely.
   > 
   > In the case of using relative timer: The next expiration cycle is 
calculate by: `arm64_arch_timer_count() + ticks * priv->frequency / 
TICK_PER_SEC = 3539876 + 1 * 62500000 / 100000 = 3539876 + 625 = 3540501`. 
Which is 710 cycles next to the `t_0`, and greater than 1 tick. Satisfy the 
requirement of sleeping for at least 1 tick.
   
   Yes, I see what you want to achieve.
   
   As I said, you could follow the example of our risc-v implementation:
   
https://github.com/tiiuae/nuttx/blob/6838f8c595716e49feacd5ddc6b569a5a4bf3118/arch/risc-v/src/common/riscv_mtimer.c#L225
   
   Just calculate first the absolute tick on which you want to wake up ( 
current tick + amount of ticks to sleep). Then convert this absolute tick value 
to timer compare value. Then your every tick start is properly aligned to a 
tick boundary, and you don't experience the rounding error - only the variance 
of consecutive tick times.
   


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