linguini1 commented on issue #16937:
URL: https://github.com/apache/nuttx/issues/16937#issuecomment-3268340239

   Have an implementation working for I2C reading, at least as far as the `i2c` 
tool bus scanner goes. I am able to scan the bus regularly and also using the 
`-z` flag for zero byte writes.
   
   Next I attempted to read the status register of the BMP280, but I am getting 
surprising results:
   
   ```
   nsh> i2c get -a 77 -r f3
   bcm2711_i2c_send: filltx: 1
   bcm2711_i2c_filltxfifo: Wrote: f3
   bcm2711_i2c_send: wrote: 1
   bcm2711_i2c_send: Starting transfer of size 1...
   bcm2711_i2c_send: Dlen: 1
   bcm2711_i2c_secondary_handler: TXW
   bcm2711_i2c_secondary_handler: Posted
   bcm2711_i2c_send: Transfer started...
   bcm2711_i2c_send: Transfer active?: 1
   bcm2711_i2c_send: Dlen: 1
   bcm2711_i2c_send: Waiting for interrupt
   bcm2711_i2c_send: Dlen (after wait): 1
   bcm2711_i2c_send: filltx: 0
   bcm2711_i2c_send: wrote: 0
   bcm2711_i2c_send: Transfer active?: 1
   bcm2711_i2c_send: Dlen: 1
   bcm2711_i2c_send: Waiting for interrupt
   ```
   
   I fill the FIFO with the single register byte that I want to send (0xf3) and 
set the transfer length to 1. It gets written to the FIFO properly, the 
transfer starts, I then get a TXW interrupt (FIFO needs write) although there 
are no more bytes to write and the FIFO contains the data already. I then hang 
waiting for a DONE interrupt that never comes.
   
   Changing the order hasn't made a difference. I tried this scenario where I 
pre-fill the FIFO before starting the transfer, and I've also tried the 
scenario where I start the transfer, wait for the TXW interrupt and then write 
the data to the FIFO. Neither of them work, they both hang waiting for a DONE 
interrupt. The last logs before hanging indicate an active transfer and that 
the DLEN hasn't been decremented. Investigating, but as far I can tell, this is 
the approach taken by other implementations.


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