xiaoxiang781216 commented on code in PR #18837:
URL: https://github.com/apache/nuttx/pull/18837#discussion_r3533089254
##########
arch/arm64/src/fvp-v8r/fvp_serial.c:
##########
@@ -37,12 +37,187 @@
#include <nuttx/serial/uart_pl011.h>
#include "arm64_internal.h"
+/***************************************************************************
+ * Pre-processor definitions
+ ***************************************************************************/
+
+#if defined(CONFIG_UART0_SERIAL_CONSOLE)
+ #define CONSOLE_DEV g_pl011_port0
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+ #define CONSOLE_DEV g_pl011_port1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
+ #define CONSOLE_DEV g_pl011_port2
+#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
+ #define CONSOLE_DEV g_pl011_port3
+#endif
+
+/* QEMU-specific configuration parameters */
+
+#define UART0_BASEADDR (0x9c090000)
+#define UART0_CLK_FREQ (24000000)
+#define UART0_IRQ (37)
+
+#define UART1_BASEADDR (0x9c0a0000)
+#define UART1_CLK_FREQ (24000000)
+#define UART1_IRQ (38)
+
+#define UART2_BASEADDR (0x9c0b0000)
+#define UART2_CLK_FREQ (24000000)
+#define UART2_IRQ (39)
+
+#define UART3_BASEADDR (0x9c0c0000)
+#define UART3_CLK_FREQ (24000000)
+#define UART3_IRQ (40)
+
+/***************************************************************************
+ * Private data
+ ***************************************************************************/
+
+#ifdef CONFIG_UART0_SERIALDRIVER
+static char g_uart0_rx_buf[CONFIG_UART0_RXBUFSIZE];
+static char g_uart0_tx_buf[CONFIG_UART0_TXBUFSIZE];
+
+static struct pl011_uart_port_s g_pl011_port0 =
+{
+ .config =
+ {
+ .baseaddr = (void *)UART0_BASEADDR,
+ .baud_rate = CONFIG_UART0_BAUD,
+ .irq_num = UART0_IRQ,
+ .sbsa = false,
+ .sys_clk_freq = UART0_CLK_FREQ,
+ },
+
+ .uart =
+ {
+ .recv =
+ {
+ .buffer = g_uart0_rx_buf,
+ .size = CONFIG_UART0_RXBUFSIZE,
+ },
+ .xmit =
+ {
+ .buffer = g_uart0_tx_buf,
+ .size = CONFIG_UART0_TXBUFSIZE,
+ },
+ },
+};
+#endif
+
+#ifdef CONFIG_UART1_SERIALDRIVER
+static char g_uart1_rx_buf[CONFIG_UART1_RXBUFSIZE];
+static char g_uart1_tx_buf[CONFIG_UART1_TXBUFSIZE];
+
+static struct pl011_uart_port_s g_pl011_port1 =
+{
+ .config =
+ {
+ .baseaddr = (void *)UART1_BASEADDR,
+ .baud_rate = CONFIG_UART1_BAUD,
+ .irq_num = UART1_IRQ,
+ .sbsa = false,
+ .sys_clk_freq = UART1_CLK_FREQ,
+ },
+
+ .uart =
+ {
+ .recv =
+ {
+ .buffer = g_uart1_rx_buf,
+ .size = CONFIG_UART1_RXBUFSIZE,
+ },
+ .xmit =
+ {
+ .buffer = g_uart1_tx_buf,
+ .size = CONFIG_UART1_TXBUFSIZE,
+ },
+ },
+};
+#endif
+
+#ifdef CONFIG_UART2_SERIALDRIVER
+static char g_uart2_rx_buf[CONFIG_UART2_RXBUFSIZE];
+static char g_uart2_tx_buf[CONFIG_UART2_TXBUFSIZE];
+
+static struct pl011_uart_port_s g_pl011_port2 =
+{
+ .config =
+ {
+ .baseaddr = (void *)UART2_BASEADDR,
+ .baud_rate = CONFIG_UART2_BAUD,
+ .irq_num = UART2_IRQ,
+ .sbsa = false,
+ .sys_clk_freq = UART2_CLK_FREQ,
+ },
+
+ .uart =
+ {
+ .recv =
+ {
+ .buffer = g_uart2_rx_buf,
+ .size = CONFIG_UART2_RXBUFSIZE,
+ },
+ .xmit =
+ {
+ .buffer = g_uart2_tx_buf,
+ .size = CONFIG_UART2_TXBUFSIZE,
+ },
+ },
+};
+#endif
+
+#ifdef CONFIG_UART3_SERIALDRIVER
+static char g_uart3_rx_buf[CONFIG_UART3_RXBUFSIZE];
Review Comment:
but why do we dup the setting in all chip?
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