xiaoxiang781216 commented on code in PR #20180:
URL: https://github.com/apache/nuttx/pull/20180#discussion_r4042833589
##########
arch/arm/src/common/stm32/stm32_eth_m3m4_v1.c:
##########
@@ -3603,15 +3611,15 @@ static int stm32_eth_ptp_adjust(long ppb)
if (ppb != 0)
{
- addend += addend * ppb / NSEC_PER_SEC;
+ addend += addend * (int64_t)ppb / NSEC_PER_SEC;
Review Comment:
remove the cast
##########
arch/arm/src/common/stm32/stm32_eth_m3m4_v1.c:
##########
@@ -3709,6 +3775,188 @@ static void stm32_eth_ptp_init(uint64_t timestamp)
#endif
}
+#if defined(CONFIG_STM32_ETH_PTP) && defined(CONFIG_PTP_CLOCK)
+/****************************************************************************
+ * Name: stm32_ptp_adjfine
+ *
+ * Description:
+ * Adjust the PTP clock frequency in parts per billion (ppb).
+ *
+ * Input Parameters:
+ * lower - Pointer to the PTP clock lower-half instance
+ * ppb - Frequency adjustment in parts per billion
+ *
+ * Returned Value:
+ * OK on success, negated errno on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_ptp_adjfine(struct ptp_lowerhalf_s *lower, long ppb)
+{
+ return stm32_eth_ptp_adjust(ppb);
+}
+
+/****************************************************************************
+ * Name: stm32_ptp_adjphase
+ *
+ * Description:
+ * Adjust the PTP clock phase by a signed offset in nanoseconds.
+ *
+ * Input Parameters:
+ * lower - Pointer to the PTP clock lower-half instance
+ * phase - Phase adjustment in nanoseconds
+ *
+ * Returned Value:
+ * OK on success, negated errno on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_ptp_adjphase(struct ptp_lowerhalf_s *lower, int32_t phase)
+{
+ return stm32_eth_ptp_adjphase((int64_t)phase);
Review Comment:
call stm32_ptp_adjtime
##########
arch/arm/src/common/stm32/stm32_eth_m3m4_v1.c:
##########
@@ -3603,15 +3611,15 @@ static int stm32_eth_ptp_adjust(long ppb)
if (ppb != 0)
{
- addend += addend * ppb / NSEC_PER_SEC;
+ addend += addend * (int64_t)ppb / NSEC_PER_SEC;
}
/* Check for overflows */
- if (addend == 0 || (uint32_t)addend != addend)
+ if (addend <= 0 || (uint64_t)addend > UINT32_MAX)
Review Comment:
why need cast
##########
arch/arm/src/common/stm32/stm32_eth_m3m4_v1.c:
##########
@@ -3632,6 +3640,64 @@ static int stm32_eth_ptp_adjust(long ppb)
return OK;
}
+/****************************************************************************
+ * Function: stm32_eth_ptp_adjphase
+ *
+ * Description:
+ * Nudge the PTP hardware counter's phase by a signed delta, in
+ * nanoseconds, via the System Time Update (TSSTU) mechanism. Unlike
+ * stm32_eth_ptp_init(), this does not reset the rate (addend) that
+ * stm32_eth_ptp_adjust() may already have applied.
+ *
+ * Input Parameters:
+ * delta_ns - Amount to add to (positive) or subtract from (negative)
+ * the current counter value.
+ *
+ * Returned Value:
+ * OK on success, negated errno on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_eth_ptp_adjphase(int64_t delta_ns)
+{
+ uint32_t regval;
+ uint32_t sec;
+ uint32_t subsec;
+ uint32_t abs_nsec;
+ uint64_t abs_ns;
+ bool negative;
+
+ negative = (delta_ns < 0);
+ abs_ns = negative ? (uint64_t)(-delta_ns) : (uint64_t)delta_ns;
Review Comment:
llabs
##########
arch/arm/src/common/stm32/stm32_eth_m3m4_v1.c:
##########
@@ -3603,15 +3611,15 @@ static int stm32_eth_ptp_adjust(long ppb)
if (ppb != 0)
{
- addend += addend * ppb / NSEC_PER_SEC;
+ addend += addend * (int64_t)ppb / NSEC_PER_SEC;
}
/* Check for overflows */
- if (addend == 0 || (uint32_t)addend != addend)
+ if (addend <= 0 || (uint64_t)addend > UINT32_MAX)
{
nerr("PTP adjustment out of range: ppb=%ld, addend=%lld\n",
- ppb, addend);
+ ppb, (long long)addend);
Review Comment:
remove the cast by a correct specifier
##########
arch/arm/src/common/stm32/stm32_eth_m3m4_v1.c:
##########
@@ -3588,7 +3596,7 @@ static inline void stm32_ethgpioconfig(struct
stm32_ethmac_s *priv)
static int stm32_eth_ptp_adjust(long ppb)
Review Comment:
merge into stm32_ptp_adjfine
##########
arch/arm/src/common/stm32/stm32_eth_m3m4_v1.c:
##########
@@ -3632,6 +3640,64 @@ static int stm32_eth_ptp_adjust(long ppb)
return OK;
}
+/****************************************************************************
+ * Function: stm32_eth_ptp_adjphase
+ *
+ * Description:
+ * Nudge the PTP hardware counter's phase by a signed delta, in
+ * nanoseconds, via the System Time Update (TSSTU) mechanism. Unlike
+ * stm32_eth_ptp_init(), this does not reset the rate (addend) that
+ * stm32_eth_ptp_adjust() may already have applied.
+ *
+ * Input Parameters:
+ * delta_ns - Amount to add to (positive) or subtract from (negative)
+ * the current counter value.
+ *
+ * Returned Value:
+ * OK on success, negated errno on failure.
+ *
+ ****************************************************************************/
+
+static int stm32_eth_ptp_adjphase(int64_t delta_ns)
Review Comment:
merge into stm32_ptp_adjtime
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