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commit a98162efc61b6163eff893914b77a63788b7ace3 Author: raiden00pl <[email protected]> AuthorDate: Wed Jun 3 22:04:26 2026 +0200 arch/arm/src/stm32: unify LSI driver and make RCC headers per-family Merge the per-family LSI oscillator drivers into a single core-agnostic common/stm32/stm32_lsi.c. To let a common/stm32 driver resolve RCC register definitions for every family without a central chip enumeration, the common/stm32/hardware/stm32_rcc.h dispatcher is removed and each family that uses it now provides its own hardware/stm32_rcc.h. stm32_lsi.c is built unconditionally for all families (including C5 and U3, which had no LSI driver before); unused code is dropped by the linker. The WB stm32_rcc_enable_lsi()/stm32_rcc_disable_lsi() are renamed to the common stm32_rcc_enablelsi()/stm32_rcc_disablelsi(). Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- .github/CODEOWNERS | 38 ++++----- arch/arm/src/common/stm32/CMakeLists.txt | 4 +- arch/arm/src/common/stm32/Make.defs | 3 +- arch/arm/src/common/stm32/hardware/stm32_rcc.h | 71 ---------------- arch/arm/src/common/stm32/stm32_hrtim_m3m4_v1.h | 2 +- .../stm32/{stm32_lsi_m0_v1.c => stm32_lsi.c} | 64 ++++++++++----- arch/arm/src/common/stm32/stm32_lsi_m3m4_v1.c | 94 ---------------------- .../hardware/{stm32c0_rcc.h => stm32_rcc.h} | 8 +- .../hardware/{stm32f0_rcc.h => stm32_rcc.h} | 8 +- .../hardware/{stm32f10xxx_rcc.h => stm32_rcc.h} | 8 +- .../hardware/{stm32f20xxx_rcc.h => stm32_rcc.h} | 8 +- arch/arm/src/stm32f3/hardware/stm32_rcc.h | 44 ++++++++++ .../hardware/{stm32f40xxx_rcc.h => stm32_rcc.h} | 8 +- arch/arm/src/stm32f7/CMakeLists.txt | 4 - arch/arm/src/stm32f7/Make.defs | 4 - arch/arm/src/stm32f7/stm32_lsi.c | 74 ----------------- .../hardware/{stm32g0_rcc.h => stm32_rcc.h} | 8 +- .../hardware/{stm32g4xxxx_rcc.h => stm32_rcc.h} | 8 +- arch/arm/src/stm32h5/CMakeLists.txt | 9 +-- arch/arm/src/stm32h5/Make.defs | 2 +- arch/arm/src/stm32h5/stm32_lsi.c | 73 ----------------- arch/arm/src/stm32h7/CMakeLists.txt | 4 - arch/arm/src/stm32h7/Make.defs | 4 - arch/arm/src/stm32h7/stm32_lsi.c | 74 ----------------- .../hardware/{stm32l0_rcc.h => stm32_rcc.h} | 8 +- .../hardware/{stm32l15xxx_rcc.h => stm32_rcc.h} | 8 +- arch/arm/src/stm32l4/CMakeLists.txt | 1 - arch/arm/src/stm32l4/Make.defs | 2 +- arch/arm/src/stm32l4/hardware/stm32_rcc.h | 44 ++++++++++ arch/arm/src/stm32l4/stm32l4_lsi.c | 73 ----------------- arch/arm/src/stm32l5/CMakeLists.txt | 1 - arch/arm/src/stm32l5/Make.defs | 2 +- .../hardware/{stm32l562xx_rcc.h => stm32_rcc.h} | 8 +- arch/arm/src/stm32l5/stm32_rcc_m33.h | 2 +- arch/arm/src/stm32l5/stm32l5_lsi.c | 73 ----------------- .../hardware/{stm32u0_rcc.h => stm32_rcc.h} | 8 +- arch/arm/src/stm32u5/CMakeLists.txt | 1 - arch/arm/src/stm32u5/Make.defs | 2 +- .../hardware/{stm32u5xx_rcc.h => stm32_rcc.h} | 6 +- arch/arm/src/stm32u5/stm32_lsi.c | 73 ----------------- arch/arm/src/stm32u5/stm32_rcc_m33.h | 2 +- arch/arm/src/stm32wb/CMakeLists.txt | 1 - arch/arm/src/stm32wb/Make.defs | 2 +- .../hardware/{stm32wb_rcc.h => stm32_rcc.h} | 2 +- arch/arm/src/stm32wb/stm32wb_ipcc.c | 2 +- arch/arm/src/stm32wb/stm32wb_rcc.c | 2 +- arch/arm/src/stm32wb/stm32wb_rcc.h | 10 +-- arch/arm/src/stm32wb/stm32wb_rcc_lsi.c | 74 ----------------- arch/arm/src/stm32wl5/CMakeLists.txt | 1 - arch/arm/src/stm32wl5/Make.defs | 2 +- .../hardware/{stm32wl5_rcc.h => stm32_rcc.h} | 2 +- arch/arm/src/stm32wl5/stm32wl5_lsi.c | 73 ----------------- arch/arm/src/stm32wl5/stm32wl5_rcc.h | 2 +- 53 files changed, 214 insertions(+), 897 deletions(-) diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS index 8482677017d..80263516e4a 100644 --- a/.github/CODEOWNERS +++ b/.github/CODEOWNERS @@ -1644,7 +1644,6 @@ arch/arm/src/common/stm32/hardware/stm32_otghs.h [email protected] raiden00 arch/arm/src/common/stm32/hardware/stm32_pwr.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/hardware/stm32_pwr_v1.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/hardware/stm32_pwr_v1_m0_g0.h [email protected] [email protected] [email protected] [email protected] [email protected] -arch/arm/src/common/stm32/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/hardware/stm32_rng.h [email protected] [email protected] [email protected] arch/arm/src/common/stm32/hardware/stm32_rng_m0.h [email protected] [email protected] [email protected] arch/arm/src/common/stm32/hardware/stm32_rng_v1.h [email protected] [email protected] [email protected] @@ -1795,8 +1794,7 @@ arch/arm/src/common/stm32/stm32_lowputc_usart_m0_v4.c [email protected] alin. arch/arm/src/common/stm32/stm32_lowputc_usart_m3m4_v1v2v3v4.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_lse_m0_v1.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_lse_m3m4_v1.c [email protected] [email protected] [email protected] [email protected] -arch/arm/src/common/stm32/stm32_lsi_m0_v1.c [email protected] [email protected] [email protected] [email protected] -arch/arm/src/common/stm32/stm32_lsi_m3m4_v1.c [email protected] [email protected] [email protected] [email protected] +arch/arm/src/common/stm32/stm32_lsi.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_ltdc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_ltdc_m3m4_v1.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_ltdc_m3m4_v1.h [email protected] [email protected] [email protected] [email protected] [email protected] @@ -3782,13 +3780,13 @@ arch/arm/src/stm32c0/Kconfig [email protected] arch/arm/src/stm32c0/chip.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32c0/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32c0/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32c0/hardware/stm32_rcc.h [email protected] arch/arm/src/stm32c0/hardware/stm32c0_dmamux.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32c0/hardware/stm32c0_exti.h [email protected] [email protected] [email protected] arch/arm/src/stm32c0/hardware/stm32c0_flash.h [email protected] [email protected] [email protected] arch/arm/src/stm32c0/hardware/stm32c0_memorymap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32c0/hardware/stm32c0_pinmap.h [email protected] arch/arm/src/stm32c0/hardware/stm32c0_pwr.h [email protected] [email protected] [email protected] -arch/arm/src/stm32c0/hardware/stm32c0_rcc.h [email protected] arch/arm/src/stm32c0/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32c0/stm32_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32c0/stm32c0_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -3796,6 +3794,7 @@ arch/arm/src/stm32f0/Kconfig [email protected] [email protected] jussi.kivilinn arch/arm/src/stm32f0/chip.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32f0/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32f0/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/hardware/stm32f03x_memorymap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/hardware/stm32f03x_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/hardware/stm32f05x_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] @@ -3805,7 +3804,6 @@ arch/arm/src/stm32f0/hardware/stm32f09x_pinmap.h [email protected] alin.je arch/arm/src/stm32f0/hardware/stm32f0_exti.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/hardware/stm32f0_flash.h [email protected] [email protected] [email protected] arch/arm/src/stm32f0/hardware/stm32f0_pwr.h [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32f0/hardware/stm32f0_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/hardware/stm32f0_syscfg.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f0/stm32_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -3815,6 +3813,7 @@ arch/arm/src/stm32f1/Kconfig.pinmap [email protected] arch/arm/src/stm32f1/chip.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32f1/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32f1/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/hardware/stm32f100_pinmap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/hardware/stm32f102_pinmap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/hardware/stm32f103c_pinmap.h [email protected] [email protected] [email protected] [email protected] @@ -3826,7 +3825,6 @@ arch/arm/src/stm32f1/hardware/stm32f105v_pinmap.h [email protected] alin.j arch/arm/src/stm32f1/hardware/stm32f107v_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/hardware/stm32f10xxx_gpio.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/hardware/stm32f10xxx_memorymap.h [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32f1/hardware/stm32f10xxx_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/stm32_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f1/stm32f10xxx_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -3834,10 +3832,10 @@ arch/arm/src/stm32f2/Kconfig [email protected] arch/arm/src/stm32f2/chip.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f2/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32f2/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32f2/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f2/hardware/stm32f20xxx_gpio.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f2/hardware/stm32f20xxx_memorymap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f2/hardware/stm32f20xxx_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32f2/hardware/stm32f20xxx_rcc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f2/hardware/stm32f20xxx_syscfg.h [email protected] [email protected] [email protected] arch/arm/src/stm32f2/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f2/stm32_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -3872,10 +3870,10 @@ arch/arm/src/stm32f4/Kconfig [email protected] arch/arm/src/stm32f4/chip.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f4/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32f4/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32f4/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f4/hardware/stm32f40xxx_gpio.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f4/hardware/stm32f40xxx_memorymap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f4/hardware/stm32f40xxx_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32f4/hardware/stm32f40xxx_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f4/hardware/stm32f40xxx_syscfg.h [email protected] [email protected] [email protected] arch/arm/src/stm32f4/hardware/stm32f412xx_pinmap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f4/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] @@ -3993,7 +3991,6 @@ arch/arm/src/stm32f7/stm32_irq.c [email protected] [email protected] mark@mjs arch/arm/src/stm32f7/stm32_lowputc.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f7/stm32_lowputc.h [email protected] [email protected] arch/arm/src/stm32f7/stm32_lse.c [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32f7/stm32_lsi.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f7/stm32_ltdc.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f7/stm32_ltdc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32f7/stm32_mpuinit.c [email protected] [email protected] [email protected] [email protected] @@ -4050,13 +4047,13 @@ arch/arm/src/stm32g0/Kconfig [email protected] arch/arm/src/stm32g0/chip.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32g0/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32g0/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32g0_dmamux.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32g0_exti.h [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32g0_flash.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32g0_memorymap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32g0_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32g0_pwr.h [email protected] [email protected] [email protected] -arch/arm/src/stm32g0/hardware/stm32g0_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/hardware/stm32g0_syscfg.h [email protected] [email protected] [email protected] arch/arm/src/stm32g0/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g0/stm32_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -4065,6 +4062,7 @@ arch/arm/src/stm32g4/Kconfig [email protected] arch/arm/src/stm32g4/chip.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32g4/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32g4/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32g47xxx_hrtim.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32g4xxc_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32g4xxk_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] @@ -4081,7 +4079,6 @@ arch/arm/src/stm32g4/hardware/stm32g4xxxx_memorymap.h 59230071+hartmannathan@use arch/arm/src/stm32g4/hardware/stm32g4xxxx_opamp.h [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32g4xxxx_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32g4xxxx_pwr.h [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32g4/hardware/stm32g4xxxx_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32g4xxxx_syscfg.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/hardware/stm32g4xxxx_vrefbuf.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32g4/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] @@ -4146,7 +4143,6 @@ arch/arm/src/stm32h5/stm32_irq.c [email protected] [email protected] wangzh arch/arm/src/stm32h5/stm32_lowputc.c [email protected] [email protected] [email protected] arch/arm/src/stm32h5/stm32_lowputc.h [email protected] [email protected] arch/arm/src/stm32h5/stm32_lse.c [email protected] [email protected] -arch/arm/src/stm32h5/stm32_lsi.c [email protected] [email protected] arch/arm/src/stm32h5/stm32_pwr.c [email protected] [email protected] arch/arm/src/stm32h5/stm32_pwr.h [email protected] [email protected] arch/arm/src/stm32h5/stm32_qspi.c [email protected] [email protected] @@ -4259,7 +4255,6 @@ arch/arm/src/stm32h7/stm32_lowputc.h [email protected] [email protected] arch/arm/src/stm32h7/stm32_lptim.c [email protected] [email protected] [email protected] arch/arm/src/stm32h7/stm32_lptim.h [email protected] [email protected] [email protected] arch/arm/src/stm32h7/stm32_lse.c [email protected] [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32h7/stm32_lsi.c [email protected] [email protected] [email protected] arch/arm/src/stm32h7/stm32_ltdc.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32h7/stm32_ltdc.h [email protected] [email protected] [email protected] arch/arm/src/stm32h7/stm32_mpuinit.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -4321,12 +4316,12 @@ arch/arm/src/stm32l0/Kconfig [email protected] arch/arm/src/stm32l0/chip.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l0/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32l0/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32l0/hardware/stm32_rcc.h [email protected] [email protected] [email protected] arch/arm/src/stm32l0/hardware/stm32l0_exti.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l0/hardware/stm32l0_flash.h [email protected] [email protected] [email protected] arch/arm/src/stm32l0/hardware/stm32l0_memorymap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l0/hardware/stm32l0_pinmap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l0/hardware/stm32l0_pwr.h [email protected] [email protected] [email protected] -arch/arm/src/stm32l0/hardware/stm32l0_rcc.h [email protected] [email protected] [email protected] arch/arm/src/stm32l0/hardware/stm32l0_syscfg.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l0/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l0/stm32_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -4335,11 +4330,11 @@ arch/arm/src/stm32l1/Kconfig [email protected] arch/arm/src/stm32l1/chip.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l1/hardware/stm32_memorymap.h [email protected] arch/arm/src/stm32l1/hardware/stm32_pinmap.h [email protected] +arch/arm/src/stm32l1/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l1/hardware/stm32l15xxx_aes.h [email protected] [email protected] arch/arm/src/stm32l1/hardware/stm32l15xxx_gpio.h [email protected] [email protected] [email protected] arch/arm/src/stm32l1/hardware/stm32l15xxx_memorymap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l1/hardware/stm32l15xxx_pinmap.h [email protected] [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32l1/hardware/stm32l15xxx_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l1/hardware/stm32l15xxx_syscfg.h [email protected] [email protected] [email protected] arch/arm/src/stm32l1/stm32.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l1/stm32_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -4450,7 +4445,6 @@ arch/arm/src/stm32l4/stm32l4_lowputc.h [email protected] [email protected] arch/arm/src/stm32l4/stm32l4_lptim.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l4/stm32l4_lptim.h [email protected] [email protected] [email protected] arch/arm/src/stm32l4/stm32l4_lse.c [email protected] [email protected] [email protected] [email protected] -arch/arm/src/stm32l4/stm32l4_lsi.c [email protected] [email protected] [email protected] arch/arm/src/stm32l4/stm32l4_mpuinit.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l4/stm32l4_mpuinit.h [email protected] [email protected] arch/arm/src/stm32l4/stm32l4_oneshot.c [email protected] [email protected] [email protected] [email protected] @@ -4513,10 +4507,10 @@ arch/arm/src/stm32l4/stm32l4xrxx_dma.c [email protected] acassis@gmail arch/arm/src/stm32l4/stm32l4xrxx_rcc.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l5/Kconfig [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l5/chip.h [email protected] [email protected] +arch/arm/src/stm32l5/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l5/hardware/stm32l562xx_dbgmcu.h [email protected] [email protected] arch/arm/src/stm32l5/hardware/stm32l562xx_pinmap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l5/hardware/stm32l562xx_pinmap_legacy.h [email protected] [email protected] [email protected] -arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l5/hardware/stm32l562xx_syscfg.h [email protected] [email protected] arch/arm/src/stm32l5/hardware/stm32l5_exti.h [email protected] [email protected] arch/arm/src/stm32l5/hardware/stm32l5_flash.h [email protected] [email protected] @@ -4544,7 +4538,6 @@ arch/arm/src/stm32l5/stm32l5_irq.c [email protected] [email protected] alin.jerp arch/arm/src/stm32l5/stm32l5_lowputc.c [email protected] [email protected] [email protected] arch/arm/src/stm32l5/stm32l5_lowputc.h [email protected] [email protected] arch/arm/src/stm32l5/stm32l5_lse.c [email protected] [email protected] [email protected] -arch/arm/src/stm32l5/stm32l5_lsi.c [email protected] [email protected] [email protected] arch/arm/src/stm32l5/stm32l5_mpuinit.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32l5/stm32l5_mpuinit.h [email protected] [email protected] arch/arm/src/stm32l5/stm32l5_pwr.c [email protected] [email protected] [email protected] [email protected] @@ -4576,13 +4569,13 @@ arch/arm/src/stm32u5/hardware/stm32_i2c.h [email protected] alin.jerpelea@ arch/arm/src/stm32u5/hardware/stm32_memorymap.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32_pinmap.h [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32_pwr.h [email protected] [email protected] [email protected] [email protected] +arch/arm/src/stm32u5/hardware/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32_spi.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32_syscfg.h [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32_tim.h [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32_uart.h [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32u5xx_dbgmcu.h [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32u5xx_pinmap.h [email protected] [email protected] [email protected] -arch/arm/src/stm32u5/hardware/stm32u5xx_rcc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32u5xx_spi.h [email protected] [email protected] [email protected] arch/arm/src/stm32u5/hardware/stm32u5xx_syscfg.h [email protected] [email protected] [email protected] arch/arm/src/stm32u5/stm32.h [email protected] [email protected] @@ -4602,7 +4595,6 @@ arch/arm/src/stm32u5/stm32_irq.c [email protected] [email protected] wangzhi16@x arch/arm/src/stm32u5/stm32_lowputc.c [email protected] [email protected] [email protected] arch/arm/src/stm32u5/stm32_lowputc.h [email protected] [email protected] arch/arm/src/stm32u5/stm32_lse.c [email protected] [email protected] [email protected] -arch/arm/src/stm32u5/stm32_lsi.c [email protected] [email protected] [email protected] arch/arm/src/stm32u5/stm32_mpuinit.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32u5/stm32_mpuinit.h [email protected] [email protected] arch/arm/src/stm32u5/stm32_pwr.c [email protected] [email protected] [email protected] [email protected] @@ -4628,6 +4620,7 @@ arch/arm/src/stm32u5/stm32_waste.h [email protected] [email protected] arch/arm/src/stm32u5/stm32u5xx_rcc.c [email protected] [email protected] arch/arm/src/stm32wb/Kconfig [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32wb/chip.h [email protected] [email protected] +arch/arm/src/stm32wb/hardware/stm32_rcc.h [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_crs.h [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_dma.h [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_dmamux.h [email protected] [email protected] @@ -4639,7 +4632,6 @@ arch/arm/src/stm32wb/hardware/stm32wb_ipcc.h [email protected] alin.jerpelea@so arch/arm/src/stm32wb/hardware/stm32wb_memorymap.h [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_pinmap.h [email protected] [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_pwr.h [email protected] [email protected] -arch/arm/src/stm32wb/hardware/stm32wb_rcc.h [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_rtc.h [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_spi.h [email protected] [email protected] arch/arm/src/stm32wb/hardware/stm32wb_syscfg.h [email protected] [email protected] @@ -4694,7 +4686,6 @@ arch/arm/src/stm32wb/stm32wb_rcc.c [email protected] [email protected] arch/arm/src/stm32wb/stm32wb_rcc.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32wb/stm32wb_rcc_hsi48.c [email protected] [email protected] [email protected] arch/arm/src/stm32wb/stm32wb_rcc_lse.c [email protected] [email protected] [email protected] -arch/arm/src/stm32wb/stm32wb_rcc_lsi.c [email protected] [email protected] arch/arm/src/stm32wb/stm32wb_rtc.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32wb/stm32wb_rtc.h [email protected] [email protected] [email protected] arch/arm/src/stm32wb/stm32wb_rtc_lowerhalf.c [email protected] [email protected] [email protected] [email protected] [email protected] @@ -4717,6 +4708,7 @@ arch/arm/src/stm32wb/stm32wb_waste.c [email protected] [email protected] arch/arm/src/stm32wb/stm32wb_waste.h [email protected] [email protected] arch/arm/src/stm32wl5/Kconfig [email protected] 49699333+dependabot[bot]@users.noreply.github.com [email protected] arch/arm/src/stm32wl5/chip.h [email protected] [email protected] +arch/arm/src/stm32wl5/hardware/stm32_rcc.h [email protected] [email protected] [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_exti.h [email protected] [email protected] [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_flash.h [email protected] [email protected] [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_gpio.h [email protected] [email protected] @@ -4724,7 +4716,6 @@ arch/arm/src/stm32wl5/hardware/stm32wl5_ipcc.h [email protected] alin.jerp arch/arm/src/stm32wl5/hardware/stm32wl5_memorymap.h [email protected] [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_pinmap.h [email protected] [email protected] [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_pwr.h [email protected] [email protected] [email protected] -arch/arm/src/stm32wl5/hardware/stm32wl5_rcc.h [email protected] [email protected] [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_spi.h 49699333+dependabot[bot]@users.noreply.github.com [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_syscfg.h [email protected] [email protected] arch/arm/src/stm32wl5/hardware/stm32wl5_tim.h [email protected] [email protected] [email protected] @@ -4744,7 +4735,6 @@ arch/arm/src/stm32wl5/stm32wl5_irq.c [email protected] [email protected] arch/arm/src/stm32wl5/stm32wl5_lowputc.c [email protected] [email protected] [email protected] arch/arm/src/stm32wl5/stm32wl5_lowputc.h [email protected] [email protected] arch/arm/src/stm32wl5/stm32wl5_lse.c [email protected] [email protected] [email protected] -arch/arm/src/stm32wl5/stm32wl5_lsi.c [email protected] [email protected] arch/arm/src/stm32wl5/stm32wl5_mpuinit.c [email protected] [email protected] [email protected] [email protected] arch/arm/src/stm32wl5/stm32wl5_mpuinit.h [email protected] [email protected] arch/arm/src/stm32wl5/stm32wl5_pwr.c [email protected] [email protected] diff --git a/arch/arm/src/common/stm32/CMakeLists.txt b/arch/arm/src/common/stm32/CMakeLists.txt index 85070c8f51a..fda0a102947 100644 --- a/arch/arm/src/common/stm32/CMakeLists.txt +++ b/arch/arm/src/common/stm32/CMakeLists.txt @@ -33,6 +33,7 @@ set(SRCS) list(APPEND SRCS stm32_waste.c) list(APPEND SRCS stm32_uid.c) +list(APPEND SRCS stm32_lsi.c) if(NOT CONFIG_ARCH_CUSTOM_PMINIT AND (CONFIG_STM32_COMMON_LEGACY OR CONFIG_ARCH_CORTEXM33)) @@ -75,7 +76,6 @@ if(CONFIG_STM32_COMMON_LEGACY) stm32_allocateheap_m3m4_v1.c stm32_start_m3m4_v1.c stm32_lse_m3m4_v1.c - stm32_lsi_m3m4_v1.c stm32_irq_m3m4_v1.c stm32_capture_m3m4_v1.c) @@ -382,7 +382,7 @@ if(CONFIG_STM32_COMMON_LEGACY) endif() if(CONFIG_ARCH_CORTEXM0) - list(APPEND SRCS stm32_irq_m0_v1.c stm32_start_m0_v1.c stm32_lsi_m0_v1.c) + list(APPEND SRCS stm32_irq_m0_v1.c stm32_start_m0_v1.c) if(CONFIG_STM32_HAVE_IP_GPIO_M0_V1) list(APPEND SRCS stm32_gpio_m0_v1.c) diff --git a/arch/arm/src/common/stm32/Make.defs b/arch/arm/src/common/stm32/Make.defs index d9125f49357..80c2e148f03 100644 --- a/arch/arm/src/common/stm32/Make.defs +++ b/arch/arm/src/common/stm32/Make.defs @@ -41,6 +41,7 @@ ARCHXXINCLUDES += ${INCDIR_PREFIX}$(STM32_COMMON_SRCDIR) CHIP_CSRCS += stm32_waste.c CHIP_CSRCS += stm32_uid.c +CHIP_CSRCS += stm32_lsi.c ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y) ifneq ($(filter y,$(CONFIG_STM32_COMMON_LEGACY) \ @@ -86,7 +87,6 @@ ifeq ($(CONFIG_STM32_COMMON_LEGACY),y) CHIP_CSRCS += stm32_allocateheap_m3m4_v1.c CHIP_CSRCS += stm32_start_m3m4_v1.c CHIP_CSRCS += stm32_lse_m3m4_v1.c -CHIP_CSRCS += stm32_lsi_m3m4_v1.c CHIP_CSRCS += stm32_irq_m3m4_v1.c ifneq ($(filter y,$(CONFIG_STM32_HAVE_IP_USART_V1) \ $(CONFIG_STM32_HAVE_IP_USART_V2) \ @@ -438,7 +438,6 @@ else ifeq ($(CONFIG_STM32_HAVE_IP_USART_V4),y) CHIP_CSRCS += stm32_lowputc_usart_m0_v4.c endif CHIP_CSRCS += stm32_start_m0_v1.c -CHIP_CSRCS += stm32_lsi_m0_v1.c ifeq ($(CONFIG_STM32_HAVE_IP_GPIO_M0_V1),y) CHIP_CSRCS += stm32_gpio_m0_v1.c endif diff --git a/arch/arm/src/common/stm32/hardware/stm32_rcc.h b/arch/arm/src/common/stm32/hardware/stm32_rcc.h deleted file mode 100644 index c6b9ef5a770..00000000000 --- a/arch/arm/src/common/stm32/hardware/stm32_rcc.h +++ /dev/null @@ -1,71 +0,0 @@ -/**************************************************************************** - * arch/arm/src/common/stm32/hardware/stm32_rcc.h - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_RCC_H -#define __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_RCC_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "chip.h" - -#if defined(CONFIG_ARCH_CHIP_STM32F0) -# include "hardware/stm32f0_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32L0) -# include "hardware/stm32l0_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32G0) -# include "hardware/stm32g0_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32C0) -# include "hardware/stm32c0_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32U0) -# include "hardware/stm32u0_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32F1) -# include "hardware/stm32f10xxx_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32F2) -# include "hardware/stm32f20xxx_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32F3) -# if defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F302X8) || \ - defined(CONFIG_STM32_STM32F302XC) || \ - defined(CONFIG_STM32_STM32F303XC) || \ - defined(CONFIG_STM32_STM32F303XE) -# include "hardware/stm32f30xxx_rcc.h" -# elif defined(CONFIG_STM32_STM32F33XX) -# include "hardware/stm32f33xxx_rcc.h" -# elif defined(CONFIG_STM32_STM32F37XX) -# include "hardware/stm32f37xxx_rcc.h" -# else -# error "Unsupported STM32F3 RCC" -# endif -#elif defined(CONFIG_ARCH_CHIP_STM32F4) -# include "hardware/stm32f40xxx_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32G4) -# include "hardware/stm32g4xxxx_rcc.h" -#elif defined(CONFIG_ARCH_CHIP_STM32L1) -# include "hardware/stm32l15xxx_rcc.h" -#else -# error "Unsupported STM32 RCC" -#endif - -#endif /* __ARCH_ARM_SRC_COMMON_STM32_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/common/stm32/stm32_hrtim_m3m4_v1.h b/arch/arm/src/common/stm32/stm32_hrtim_m3m4_v1.h index 026c6e2e7f3..d6580e8b3d3 100644 --- a/arch/arm/src/common/stm32/stm32_hrtim_m3m4_v1.h +++ b/arch/arm/src/common/stm32/stm32_hrtim_m3m4_v1.h @@ -40,7 +40,7 @@ # include "hardware/stm32f33xxx_rcc.h" #elif defined(CONFIG_STM32_STM32G47XX) # include "hardware/stm32g47xxx_hrtim.h" -# include "hardware/stm32g4xxxx_rcc.h" +# include "hardware/stm32_rcc.h" #else # error #endif diff --git a/arch/arm/src/common/stm32/stm32_lsi_m0_v1.c b/arch/arm/src/common/stm32/stm32_lsi.c similarity index 56% rename from arch/arm/src/common/stm32/stm32_lsi_m0_v1.c rename to arch/arm/src/common/stm32/stm32_lsi.c index 19aa04dd4f0..8a8dea2f13e 100644 --- a/arch/arm/src/common/stm32/stm32_lsi_m0_v1.c +++ b/arch/arm/src/common/stm32/stm32_lsi.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/common/stm32/stm32_lsi_m0_v1.c + * arch/arm/src/common/stm32/stm32_lsi.c * * SPDX-License-Identifier: Apache-2.0 * @@ -33,22 +33,42 @@ * Pre-processor Definitions ****************************************************************************/ -/* STM32C0 uses the second CSR register for LSI. */ - -#ifdef CONFIG_ARCH_CHIP_STM32C0 -# define STM32_RCC_CSR STM32_RCC_CSR2 -# define RCC_CSR_LSION RCC_CSR2_LSION -# define RCC_CSR_LSIRDY RCC_CSR2_LSIRDY +/* The LSI enable/disable sequence is identical on every STM32, regardless of + * the CPU core. Only the register/bits that carry LSION/LSIRDY differ: + * + * - most families : RCC_CSR (LSION/LSIRDY) + * - STM32C0 : RCC_CSR2 (LSION/LSIRDY) + * - STM32C5 : RCC_RTCCR (LSION/LSIRDY) + * - STM32WB : RCC_CSR (LSI1ON/LSI1RDY) + * - STM32H5/U5 : RCC_BDCR (LSION/LSIRDY) + * + * A single driver therefore serves all of them, selecting the register with + * the preprocessor below. + */ + +#if defined(CONFIG_ARCH_CHIP_STM32C5) +# define STM32_RCC_LSI_REG STM32_RCC_RTCCR +# define RCC_LSI_LSION RCC_RTCCR_LSION +# define RCC_LSI_LSIRDY RCC_RTCCR_LSIRDY +#elif defined(CONFIG_ARCH_CHIP_STM32H5) || \ + defined(CONFIG_ARCH_CHIP_STM32U5) +# define STM32_RCC_LSI_REG STM32_RCC_BDCR +# define RCC_LSI_LSION RCC_BDCR_LSION +# define RCC_LSI_LSIRDY RCC_BDCR_LSIRDY +#elif defined(CONFIG_ARCH_CHIP_STM32C0) +# define STM32_RCC_LSI_REG STM32_RCC_CSR2 +# define RCC_LSI_LSION RCC_CSR2_LSION +# define RCC_LSI_LSIRDY RCC_CSR2_LSIRDY +#elif defined(CONFIG_ARCH_CHIP_STM32WB) +# define STM32_RCC_LSI_REG STM32_RCC_CSR +# define RCC_LSI_LSION RCC_CSR_LSI1ON +# define RCC_LSI_LSIRDY RCC_CSR_LSI1RDY +#else +# define STM32_RCC_LSI_REG STM32_RCC_CSR +# define RCC_LSI_LSION RCC_CSR_LSION +# define RCC_LSI_LSIRDY RCC_CSR_LSIRDY #endif -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -64,14 +84,14 @@ void stm32_rcc_enablelsi(void) { /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit in the RCC CSR register. + * bit in the controlling RCC register. */ - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION); + modifyreg32(STM32_RCC_LSI_REG, 0, RCC_LSI_LSION); - /* Wait for the internal RC 40 kHz oscillator to be stable. */ + /* Wait for the internal LSI oscillator to be stable. */ - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0); + while ((getreg32(STM32_RCC_LSI_REG) & RCC_LSI_LSIRDY) == 0); } /**************************************************************************** @@ -84,11 +104,11 @@ void stm32_rcc_enablelsi(void) void stm32_rcc_disablelsi(void) { - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit in the RCC CSR register. + /* Disable the Internal Low-Speed (LSI) RC Oscillator by resetting the + * LSION bit in the controlling RCC register. */ - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0); + modifyreg32(STM32_RCC_LSI_REG, RCC_LSI_LSION, 0); /* LSIRDY should go low after 3 LSI clock cycles */ } diff --git a/arch/arm/src/common/stm32/stm32_lsi_m3m4_v1.c b/arch/arm/src/common/stm32/stm32_lsi_m3m4_v1.c deleted file mode 100644 index 97ae757a001..00000000000 --- a/arch/arm/src/common/stm32/stm32_lsi_m3m4_v1.c +++ /dev/null @@ -1,94 +0,0 @@ -/**************************************************************************** - * arch/arm/src/common/stm32/stm32_lsi_m3m4_v1.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include "arm_internal.h" -#include "stm32_rcc.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* STM32C0 uses the second CSR register for LSI. */ - -#ifdef CONFIG_ARCH_CHIP_STM32C0 -# define STM32_RCC_CSR STM32_RCC_CSR2 -# define RCC_CSR_LSION RCC_CSR2_LSION -# define RCC_CSR_LSIRDY RCC_CSR2_LSIRDY -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit in the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION); - - /* Wait for the internal RC 40 kHz oscillator to be stable. */ - - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit in the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32c0/hardware/stm32c0_rcc.h b/arch/arm/src/stm32c0/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32c0/hardware/stm32c0_rcc.h rename to arch/arm/src/stm32c0/hardware/stm32_rcc.h index aa8765f001c..5389984e441 100644 --- a/arch/arm/src/stm32c0/hardware/stm32c0_rcc.h +++ b/arch/arm/src/stm32c0/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32c0/hardware/stm32c0_rcc.h + * arch/arm/src/stm32c0/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32C0_HARDWARE_STM32C0_RCC_H -#define __ARCH_ARM_SRC_STM32C0_HARDWARE_STM32C0_RCC_H +#ifndef __ARCH_ARM_SRC_STM32C0_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32C0_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -391,4 +391,4 @@ #define RCC_CSR2_WWDGRSTF (1 << 30) /* Bit 30: WWDG reset flag */ #define RCC_CSR2_LPWRRSTF (1 << 31) /* Bit 31: Low-power reset flag */ -#endif /* __ARCH_ARM_SRC_STM32C0_HARDWARE_STM32C0_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32C0_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32f0/hardware/stm32f0_rcc.h b/arch/arm/src/stm32f0/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32f0/hardware/stm32f0_rcc.h rename to arch/arm/src/stm32f0/hardware/stm32_rcc.h index 3bd0a3dab17..8c257d16397 100644 --- a/arch/arm/src/stm32f0/hardware/stm32f0_rcc.h +++ b/arch/arm/src/stm32f0/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32f0/hardware/stm32f0_rcc.h + * arch/arm/src/stm32f0/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_RCC_H -#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_RCC_H +#ifndef __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -391,4 +391,4 @@ #define RCC_CR2_HSI48CAL_SHIFT (24) /* Bits 24-31: HSI48 factory clock calibration */ #define RCC_CR2_HSI48CAL_MASK (0xff << RCC_CR2_HSI48CAL_SHIFT) -#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32F0_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32F0_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32f1/hardware/stm32f10xxx_rcc.h b/arch/arm/src/stm32f1/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32f1/hardware/stm32f10xxx_rcc.h rename to arch/arm/src/stm32f1/hardware/stm32_rcc.h index 54828425c3c..87a2d7096ca 100644 --- a/arch/arm/src/stm32f1/hardware/stm32f10xxx_rcc.h +++ b/arch/arm/src/stm32f1/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32f1/hardware/stm32f10xxx_rcc.h + * arch/arm/src/stm32f1/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32F10XXX_RCC_H -#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32F10XXX_RCC_H +#ifndef __ARCH_ARM_SRC_STM32F1_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32F1_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -471,4 +471,4 @@ #endif -#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F10XXX_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32F1_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32f2/hardware/stm32f20xxx_rcc.h b/arch/arm/src/stm32f2/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32f2/hardware/stm32f20xxx_rcc.h rename to arch/arm/src/stm32f2/hardware/stm32_rcc.h index 31af35f07a1..b5d0597e006 100644 --- a/arch/arm/src/stm32f2/hardware/stm32f20xxx_rcc.h +++ b/arch/arm/src/stm32f2/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32f2/hardware/stm32f20xxx_rcc.h + * arch/arm/src/stm32f2/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32F20XXX_RCC_H -#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32F20XXX_RCC_H +#ifndef __ARCH_ARM_SRC_STM32F2_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32F2_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -503,4 +503,4 @@ #define RCC_PLLI2SCFGR_PLLI2SR_SHIFT (28) /* Bits 28-30: PLLI2S division factor for I2S clocks */ #define RCC_PLLI2SCFGR_PLLI2SR_MASK (7 << RCC_PLLI2SCFGR_PLLI2SR_SHIFT) -#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F20XXX_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32F2_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32f3/hardware/stm32_rcc.h b/arch/arm/src/stm32f3/hardware/stm32_rcc.h new file mode 100644 index 00000000000..6a18a3dea3f --- /dev/null +++ b/arch/arm/src/stm32f3/hardware/stm32_rcc.h @@ -0,0 +1,44 @@ +/**************************************************************************** + * arch/arm/src/stm32f3/hardware/stm32_rcc.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_RCC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F302X8) || \ + defined(CONFIG_STM32_STM32F302XC) || defined(CONFIG_STM32_STM32F303XC) || \ + defined(CONFIG_STM32_STM32F303XE) +# include "hardware/stm32f30xxx_rcc.h" +#elif defined(CONFIG_STM32_STM32F33XX) +# include "hardware/stm32f33xxx_rcc.h" +#elif defined(CONFIG_STM32_STM32F37XX) +# include "hardware/stm32f37xxx_rcc.h" +#else +# error "Unsupported STM32 F3 part" +#endif + +#endif /* __ARCH_ARM_SRC_STM32F3_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32f4/hardware/stm32f40xxx_rcc.h b/arch/arm/src/stm32f4/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32f4/hardware/stm32f40xxx_rcc.h rename to arch/arm/src/stm32f4/hardware/stm32_rcc.h index d4e56f3f296..1fd8fa4670f 100644 --- a/arch/arm/src/stm32f4/hardware/stm32f40xxx_rcc.h +++ b/arch/arm/src/stm32f4/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32f4/hardware/stm32f40xxx_rcc.h + * arch/arm/src/stm32f4/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32F40XXX_RCC_H -#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32F40XXX_RCC_H +#ifndef __ARCH_ARM_SRC_STM32F4_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32F4_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -937,4 +937,4 @@ # define RCC_DCKCFGR2_SPDIFRXSEL_PLLI2S (1 << RCC_DCKCFGR2_SPDIFRXSEL_SHIFT) /* PLLI2S clock is selected as SPDIF-Rx clock */ #endif -#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F40XXX_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32F4_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32f7/CMakeLists.txt b/arch/arm/src/stm32f7/CMakeLists.txt index 35b89101b15..e0373f43419 100644 --- a/arch/arm/src/stm32f7/CMakeLists.txt +++ b/arch/arm/src/stm32f7/CMakeLists.txt @@ -85,10 +85,6 @@ if(CONFIG_STM32_FMC) list(APPEND SRCS stm32_fmc.c) endif() -if(CONFIG_STM32_IWDG OR CONFIG_STM32_RTC_LSICLOCK) - list(APPEND SRCS stm32_lsi.c) -endif() - if(CONFIG_STM32_RTC_LSECLOCK) list(APPEND SRCS stm32_lse.c) endif() diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs index 30637c137f5..403e3b0cd4a 100644 --- a/arch/arm/src/stm32f7/Make.defs +++ b/arch/arm/src/stm32f7/Make.defs @@ -84,10 +84,6 @@ CHIP_CSRCS += stm32_rtc_lowerhalf.c endif endif -ifeq ($(filter y,$(CONFIG_STM32_IWDG) $(CONFIG_STM32_RTC_LSICLOCK)),y) -CHIP_CSRCS += stm32_lsi.c -endif - ifeq ($(CONFIG_STM32_RTC_LSECLOCK),y) CHIP_CSRCS += stm32_lse.c endif diff --git a/arch/arm/src/stm32f7/stm32_lsi.c b/arch/arm/src/stm32f7/stm32_lsi.c deleted file mode 100644 index cc5e46b4fba..00000000000 --- a/arch/arm/src/stm32f7/stm32_lsi.c +++ /dev/null @@ -1,74 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32f7/stm32_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include "arm_internal.h" -#include "stm32_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION); - - /* Wait for the internal RC 40 kHz oscillator to be stable. */ - - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32g0/hardware/stm32g0_rcc.h b/arch/arm/src/stm32g0/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32g0/hardware/stm32g0_rcc.h rename to arch/arm/src/stm32g0/hardware/stm32_rcc.h index 003a2305754..68490521c1a 100644 --- a/arch/arm/src/stm32g0/hardware/stm32g0_rcc.h +++ b/arch/arm/src/stm32g0/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32g0/hardware/stm32g0_rcc.h + * arch/arm/src/stm32g0/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32G0_HARDWARE_STM32G0_RCC_H -#define __ARCH_ARM_SRC_STM32G0_HARDWARE_STM32G0_RCC_H +#ifndef __ARCH_ARM_SRC_STM32G0_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32G0_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -366,4 +366,4 @@ #define RCC_CSR_WWDGRSTF (1 << 30) /* Bit 30: WWDG reset flag */ #define RCC_CSR_LPWRRSTF (1 << 31) /* Bit 31: Low-power reset flag */ -#endif /* __ARCH_ARM_SRC_STM32G0_HARDWARE_STM32G0_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32G0_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32g4/hardware/stm32g4xxxx_rcc.h b/arch/arm/src/stm32g4/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32g4/hardware/stm32g4xxxx_rcc.h rename to arch/arm/src/stm32g4/hardware/stm32_rcc.h index 0b4f2cb8c76..e1f76fb12d7 100644 --- a/arch/arm/src/stm32g4/hardware/stm32g4xxxx_rcc.h +++ b/arch/arm/src/stm32g4/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32g4/hardware/stm32g4xxxx_rcc.h + * arch/arm/src/stm32g4/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_RCC_H -#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_RCC_H +#ifndef __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -693,4 +693,4 @@ #define RCC_APB1ENR_TIM4EN RCC_APB1ENR1_TIM4EN #define RCC_APB1ENR_TIM5EN RCC_APB1ENR1_TIM5EN -#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32G4_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32h5/CMakeLists.txt b/arch/arm/src/stm32h5/CMakeLists.txt index 681c2585ffe..36fd634b8f7 100644 --- a/arch/arm/src/stm32h5/CMakeLists.txt +++ b/arch/arm/src/stm32h5/CMakeLists.txt @@ -34,14 +34,7 @@ endif() # Required STM32H5 files -list( - APPEND - SRCS - stm32_rcc.c - stm32_pwr.c - stm32_lse.c - stm32_lsi.c - stm32_sdmmc.c) +list(APPEND SRCS stm32_rcc.c stm32_pwr.c stm32_lse.c stm32_sdmmc.c) if(CONFIG_TIMER) list(APPEND SRCS stm32_tim_lowerhalf.c) diff --git a/arch/arm/src/stm32h5/Make.defs b/arch/arm/src/stm32h5/Make.defs index 75a96ddef47..56c131a4e07 100644 --- a/arch/arm/src/stm32h5/Make.defs +++ b/arch/arm/src/stm32h5/Make.defs @@ -42,7 +42,7 @@ endif CHIP_CSRCS += stm32_rcc.c CHIP_CSRCS += stm32_pwr.c -CHIP_CSRCS += stm32_lse.c stm32_lsi.c stm32_sdmmc.c +CHIP_CSRCS += stm32_lse.c stm32_sdmmc.c ifeq ($(CONFIG_TIMER),y) CHIP_CSRCS += stm32_tim_lowerhalf.c diff --git a/arch/arm/src/stm32h5/stm32_lsi.c b/arch/arm/src/stm32h5/stm32_lsi.c deleted file mode 100644 index 463f05cd51c..00000000000 --- a/arch/arm/src/stm32h5/stm32_lsi.c +++ /dev/null @@ -1,73 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32h5/stm32_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "arm_internal.h" -#include "stm32_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_LSION); - - /* Wait for the internal LSI oscillator to be stable. */ - - while ((getreg32(STM32_RCC_BDCR) & RCC_BDCR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_BDCR, RCC_BDCR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32h7/CMakeLists.txt b/arch/arm/src/stm32h7/CMakeLists.txt index ecc0880d253..e889b4ccbed 100644 --- a/arch/arm/src/stm32h7/CMakeLists.txt +++ b/arch/arm/src/stm32h7/CMakeLists.txt @@ -96,10 +96,6 @@ if(CONFIG_STM32_RNG) list(APPEND SRCS stm32_rng.c) endif() -if(CONFIG_STM32_IWDG OR CONFIG_STM32_RTC_LSICLOCK) - list(APPEND SRCS stm32_lsi.c) -endif() - if(CONFIG_STM32_RTC_LSECLOCK) list(APPEND SRCS stm32_lse.c) endif() diff --git a/arch/arm/src/stm32h7/Make.defs b/arch/arm/src/stm32h7/Make.defs index 5120ab178b8..c11eb0dd739 100644 --- a/arch/arm/src/stm32h7/Make.defs +++ b/arch/arm/src/stm32h7/Make.defs @@ -99,10 +99,6 @@ ifeq ($(CONFIG_STM32_FMC),y) CHIP_CSRCS += stm32_fmc.c endif -ifneq ($(filter y,$(CONFIG_STM32_IWDG) $(CONFIG_STM32_RTC_LSICLOCK)),) -CHIP_CSRCS += stm32_lsi.c -endif - ifeq ($(CONFIG_STM32_RTC_LSECLOCK),y) CHIP_CSRCS += stm32_lse.c endif diff --git a/arch/arm/src/stm32h7/stm32_lsi.c b/arch/arm/src/stm32h7/stm32_lsi.c deleted file mode 100644 index abfa0c0d8de..00000000000 --- a/arch/arm/src/stm32h7/stm32_lsi.c +++ /dev/null @@ -1,74 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32h7/stm32_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include "arm_internal.h" -#include "stm32_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION); - - /* Wait for the internal RC 40 kHz oscillator to be stable. */ - - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32l0/hardware/stm32l0_rcc.h b/arch/arm/src/stm32l0/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32l0/hardware/stm32l0_rcc.h rename to arch/arm/src/stm32l0/hardware/stm32_rcc.h index 1b924ce6870..8d4ccc91a9f 100644 --- a/arch/arm/src/stm32l0/hardware/stm32l0_rcc.h +++ b/arch/arm/src/stm32l0/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32l0/hardware/stm32l0_rcc.h + * arch/arm/src/stm32l0/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_RCC_H -#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_RCC_H +#ifndef __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -538,4 +538,4 @@ #define RCC_CSR_WWDGRSTF (1 << 30) /* Bit 30: WWDG reset flag */ #define RCC_CSR_LPWRRSTF (1 << 31) /* Bit 31: Low-power reset flag */ -#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32L0_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32L0_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32l1/hardware/stm32l15xxx_rcc.h b/arch/arm/src/stm32l1/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32l1/hardware/stm32l15xxx_rcc.h rename to arch/arm/src/stm32l1/hardware/stm32_rcc.h index c557971f1a3..50690b0bc45 100644 --- a/arch/arm/src/stm32l1/hardware/stm32l15xxx_rcc.h +++ b/arch/arm/src/stm32l1/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32l1/hardware/stm32l15xxx_rcc.h + * arch/arm/src/stm32l1/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32L15XXX_RCC_H -#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32L15XXX_RCC_H +#ifndef __ARCH_ARM_SRC_STM32L1_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32L1_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -459,4 +459,4 @@ #define RCC_CSR_WWDGRSTF (1 << 30) /* Bit 30: Window watchdog reset flag */ #define RCC_CSR_LPWRRSTF (1 << 31) /* Bit 31: Low-Power reset flag */ -#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32L15XXX_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32L1_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32l4/CMakeLists.txt b/arch/arm/src/stm32l4/CMakeLists.txt index 0d2406e4095..f9acdab2776 100644 --- a/arch/arm/src/stm32l4/CMakeLists.txt +++ b/arch/arm/src/stm32l4/CMakeLists.txt @@ -36,7 +36,6 @@ list( stm32l4_spi.c stm32l4_i2c.c stm32l4_lse.c - stm32l4_lsi.c stm32l4_pwr.c stm32l4_tim.c stm32l4_flash.c diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs index d62701c5fc4..43f3e5de5ec 100644 --- a/arch/arm/src/stm32l4/Make.defs +++ b/arch/arm/src/stm32l4/Make.defs @@ -33,7 +33,7 @@ include common/stm32/Make.defs CHIP_CSRCS += stm32l4_allocateheap.c stm32l4_exti_gpio.c stm32l4_gpio.c CHIP_CSRCS += stm32l4_irq.c stm32l4_lowputc.c stm32l4_rcc.c CHIP_CSRCS += stm32l4_serial.c stm32l4_start.c -CHIP_CSRCS += stm32l4_spi.c stm32l4_i2c.c stm32l4_lse.c stm32l4_lsi.c +CHIP_CSRCS += stm32l4_spi.c stm32l4_i2c.c stm32l4_lse.c CHIP_CSRCS += stm32l4_pwr.c stm32l4_tim.c stm32l4_flash.c CHIP_CSRCS += stm32l4_dfumode.c diff --git a/arch/arm/src/stm32l4/hardware/stm32_rcc.h b/arch/arm/src/stm32l4/hardware/stm32_rcc.h new file mode 100644 index 00000000000..25063763b41 --- /dev/null +++ b/arch/arm/src/stm32l4/hardware/stm32_rcc.h @@ -0,0 +1,44 @@ +/**************************************************************************** + * arch/arm/src/stm32l4/hardware/stm32_rcc.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32_RCC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#if defined(CONFIG_STM32_STM32L4X3) +# include "hardware/stm32l4x3xx_rcc.h" +#elif defined(CONFIG_STM32_STM32L4X5) +# include "hardware/stm32l4x5xx_rcc.h" +#elif defined(CONFIG_STM32_STM32L4X6) +# include "hardware/stm32l4x6xx_rcc.h" +#elif defined(CONFIG_STM32_STM32L4XR) +# include "hardware/stm32l4xrxx_rcc.h" +#else +# error "Unsupported STM32L4 chip" +#endif + +#endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32l4/stm32l4_lsi.c b/arch/arm/src/stm32l4/stm32l4_lsi.c deleted file mode 100644 index ae42b876ca2..00000000000 --- a/arch/arm/src/stm32l4/stm32l4_lsi.c +++ /dev/null @@ -1,73 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32l4/stm32l4_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "arm_internal.h" -#include "stm32l4_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION); - - /* Wait for the internal LSI oscillator to be stable. */ - - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32l5/CMakeLists.txt b/arch/arm/src/stm32l5/CMakeLists.txt index 7d13f669095..8956c8b6cdf 100644 --- a/arch/arm/src/stm32l5/CMakeLists.txt +++ b/arch/arm/src/stm32l5/CMakeLists.txt @@ -28,7 +28,6 @@ list( stm32l5_rcc.c stm32l5_spi.c stm32l5_lse.c - stm32l5_lsi.c stm32l5_pwr.c stm32l5_tim.c stm32l5_flash.c) diff --git a/arch/arm/src/stm32l5/Make.defs b/arch/arm/src/stm32l5/Make.defs index a0d9d8a4725..e6a334e08ff 100644 --- a/arch/arm/src/stm32l5/Make.defs +++ b/arch/arm/src/stm32l5/Make.defs @@ -34,7 +34,7 @@ include common/stm32/Make.defs CHIP_ASRCS = CHIP_CSRCS += stm32l5_rcc.c -CHIP_CSRCS += stm32l5_spi.c stm32l5_lse.c stm32l5_lsi.c +CHIP_CSRCS += stm32l5_spi.c stm32l5_lse.c CHIP_CSRCS += stm32l5_pwr.c stm32l5_tim.c stm32l5_flash.c ifeq ($(CONFIG_TIMER),y) diff --git a/arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h b/arch/arm/src/stm32l5/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h rename to arch/arm/src/stm32l5/hardware/stm32_rcc.h index 64d4f7215e2..e9e15bb3f62 100644 --- a/arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h +++ b/arch/arm/src/stm32l5/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h + * arch/arm/src/stm32l5/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32L5_HARDWARE_STM32L562XX_RCC_H -#define __ARCH_ARM_SRC_STM32L5_HARDWARE_STM32L562XX_RCC_H +#ifndef __ARCH_ARM_SRC_STM32L5_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32L5_HARDWARE_STM32_RCC_H /**************************************************************************** * Included Files @@ -866,4 +866,4 @@ # define RCC_CCIPR2_OSPISEL_PLL48M1CLK (2 << RCC_CCIPR2_OSPISEL_SHIFT) #endif /* CONFIG_STM32_STM32L562XX */ -#endif /* __ARCH_ARM_SRC_STM32L5_HARDWARE_STM32L562XX_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32L5_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32l5/stm32_rcc_m33.h b/arch/arm/src/stm32l5/stm32_rcc_m33.h index 3343fb33bd5..bd4048f3705 100644 --- a/arch/arm/src/stm32l5/stm32_rcc_m33.h +++ b/arch/arm/src/stm32l5/stm32_rcc_m33.h @@ -33,7 +33,7 @@ #include "chip.h" #if defined(CONFIG_STM32_STM32L562XX) -# include "hardware/stm32l562xx_rcc.h" +# include "hardware/stm32_rcc.h" #else # error "Unsupported STM32L5 chip" #endif diff --git a/arch/arm/src/stm32l5/stm32l5_lsi.c b/arch/arm/src/stm32l5/stm32l5_lsi.c deleted file mode 100644 index 04b12c66d10..00000000000 --- a/arch/arm/src/stm32l5/stm32l5_lsi.c +++ /dev/null @@ -1,73 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32l5/stm32l5_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "arm_internal.h" -#include "stm32_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION); - - /* Wait for the internal LSI oscillator to be stable. */ - - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32u0/hardware/stm32u0_rcc.h b/arch/arm/src/stm32u0/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32u0/hardware/stm32u0_rcc.h rename to arch/arm/src/stm32u0/hardware/stm32_rcc.h index 14873641064..ffd203a0164 100644 --- a/arch/arm/src/stm32u0/hardware/stm32u0_rcc.h +++ b/arch/arm/src/stm32u0/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32u0/hardware/stm32u0_rcc.h + * arch/arm/src/stm32u0/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32U0_HARDWARE_STM32U0_RCC_H -#define __ARCH_ARM_SRC_STM32U0_HARDWARE_STM32U0_RCC_H +#ifndef __ARCH_ARM_SRC_STM32U0_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32U0_HARDWARE_STM32_RCC_H /**************************************************************************** * Pre-processor Definitions @@ -608,4 +608,4 @@ #define RCC_CRRCR_HSI48CAL_SHIFT (7) /* Bits 7-15: HSI48 clock calibration */ #define RCC_CRRCR_HSI48CAL_MASK (0x1ff << RCC_CRRCR_HSI48CAL_SHIFT) -#endif /* __ARCH_ARM_SRC_STM32U0_HARDWARE_STM32U0_RCC_H */ +#endif /* __ARCH_ARM_SRC_STM32U0_HARDWARE_STM32_RCC_H */ diff --git a/arch/arm/src/stm32u5/CMakeLists.txt b/arch/arm/src/stm32u5/CMakeLists.txt index 8fa2143ae19..a40d8a51ff4 100644 --- a/arch/arm/src/stm32u5/CMakeLists.txt +++ b/arch/arm/src/stm32u5/CMakeLists.txt @@ -25,7 +25,6 @@ set(SRCS stm32_i2c.c stm32_spi.c stm32_lse.c - stm32_lsi.c stm32u5xx_rcc.c stm32_pwr.c stm32_tim.c diff --git a/arch/arm/src/stm32u5/Make.defs b/arch/arm/src/stm32u5/Make.defs index e651d34759c..1bf6c884846 100644 --- a/arch/arm/src/stm32u5/Make.defs +++ b/arch/arm/src/stm32u5/Make.defs @@ -34,7 +34,7 @@ include common/stm32/Make.defs CHIP_ASRCS = CHIP_CSRCS += stm32_rcc.c stm32_i2c.c -CHIP_CSRCS += stm32_spi.c stm32_lse.c stm32_lsi.c stm32u5xx_rcc.c +CHIP_CSRCS += stm32_spi.c stm32_lse.c stm32u5xx_rcc.c CHIP_CSRCS += stm32_pwr.c stm32_tim.c stm32_flash.c ifeq ($(CONFIG_TIMER),y) diff --git a/arch/arm/src/stm32u5/hardware/stm32u5xx_rcc.h b/arch/arm/src/stm32u5/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32u5/hardware/stm32u5xx_rcc.h rename to arch/arm/src/stm32u5/hardware/stm32_rcc.h index f78e13bfccd..aaebbddb012 100644 --- a/arch/arm/src/stm32u5/hardware/stm32u5xx_rcc.h +++ b/arch/arm/src/stm32u5/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32u5/hardware/stm32u5xx_rcc.h + * arch/arm/src/stm32u5/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * @@ -20,8 +20,8 @@ * ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_STM32U5_HARDWARE_STM32U5xx_RCC_H -#define __ARCH_ARM_SRC_STM32U5_HARDWARE_STM32U5xx_RCC_H +#ifndef __ARCH_ARM_SRC_STM32U5_HARDWARE_STM32_RCC_H +#define __ARCH_ARM_SRC_STM32U5_HARDWARE_STM32_RCC_H /**************************************************************************** * Included Files diff --git a/arch/arm/src/stm32u5/stm32_lsi.c b/arch/arm/src/stm32u5/stm32_lsi.c deleted file mode 100644 index 34e53e22ac4..00000000000 --- a/arch/arm/src/stm32u5/stm32_lsi.c +++ /dev/null @@ -1,73 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32u5/stm32_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "arm_internal.h" -#include "stm32_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC BDCR register. - */ - - modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_LSION); - - /* Wait for the internal LSI oscillator to be stable. */ - - while ((getreg32(STM32_RCC_BDCR) & RCC_BDCR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Disable the Internal Low-Speed (LSI) RC Oscillator by resetting the - * LSION bit the RCC BDCR register. - */ - - modifyreg32(STM32_RCC_BDCR, RCC_BDCR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32u5/stm32_rcc_m33.h b/arch/arm/src/stm32u5/stm32_rcc_m33.h index 0bee3e56f1c..2f046122627 100644 --- a/arch/arm/src/stm32u5/stm32_rcc_m33.h +++ b/arch/arm/src/stm32u5/stm32_rcc_m33.h @@ -33,7 +33,7 @@ #include "chip.h" #if defined(CONFIG_STM32_STM32U585XX) || defined(CONFIG_STM32_STM32U5A5XX) -# include "hardware/stm32u5xx_rcc.h" +# include "hardware/stm32_rcc.h" #else # error "Unsupported STM32U5 chip" #endif diff --git a/arch/arm/src/stm32wb/CMakeLists.txt b/arch/arm/src/stm32wb/CMakeLists.txt index 03f9157eed5..5d716f780a4 100644 --- a/arch/arm/src/stm32wb/CMakeLists.txt +++ b/arch/arm/src/stm32wb/CMakeLists.txt @@ -34,7 +34,6 @@ set(SRCS stm32wb_i2c.c stm32wb_start.c stm32wb_rcc_lse.c - stm32wb_rcc_lsi.c stm32wb_pwr.c stm32wb_tim.c stm32wb_flash.c) diff --git a/arch/arm/src/stm32wb/Make.defs b/arch/arm/src/stm32wb/Make.defs index 5a4bdcdb88e..5c14a1271b0 100644 --- a/arch/arm/src/stm32wb/Make.defs +++ b/arch/arm/src/stm32wb/Make.defs @@ -33,7 +33,7 @@ include common/stm32/Make.defs CHIP_CSRCS += stm32wb_allocateheap.c stm32wb_exti_gpio.c stm32wb_gpio.c CHIP_CSRCS += stm32wb_irq.c stm32wb_lowputc.c stm32wb_rcc.c stm32wb_spi.c CHIP_CSRCS += stm32wb_serial.c stm32wb_i2c.c stm32wb_start.c -CHIP_CSRCS += stm32wb_rcc_lse.c stm32wb_rcc_lsi.c +CHIP_CSRCS += stm32wb_rcc_lse.c CHIP_CSRCS += stm32wb_pwr.c stm32wb_tim.c CHIP_CSRCS += stm32wb_flash.c diff --git a/arch/arm/src/stm32wb/hardware/stm32wb_rcc.h b/arch/arm/src/stm32wb/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32wb/hardware/stm32wb_rcc.h rename to arch/arm/src/stm32wb/hardware/stm32_rcc.h index 568d362051d..bd39b2e35ce 100644 --- a/arch/arm/src/stm32wb/hardware/stm32wb_rcc.h +++ b/arch/arm/src/stm32wb/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32wb/hardware/stm32wb_rcc.h + * arch/arm/src/stm32wb/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * diff --git a/arch/arm/src/stm32wb/stm32wb_ipcc.c b/arch/arm/src/stm32wb/stm32wb_ipcc.c index c9b889aec9a..b03cb653440 100644 --- a/arch/arm/src/stm32wb/stm32wb_ipcc.c +++ b/arch/arm/src/stm32wb/stm32wb_ipcc.c @@ -31,7 +31,7 @@ #include "arm_internal.h" #include "chip.h" #include "stm32wb_ipcc.h" -#include "hardware/stm32wb_rcc.h" +#include "hardware/stm32_rcc.h" #include "hardware/stm32wb_exti.h" #include "hardware/stm32wb_pwr.h" diff --git a/arch/arm/src/stm32wb/stm32wb_rcc.c b/arch/arm/src/stm32wb/stm32wb_rcc.c index bd2878d4523..7c1a73c5c44 100644 --- a/arch/arm/src/stm32wb/stm32wb_rcc.c +++ b/arch/arm/src/stm32wb/stm32wb_rcc.c @@ -789,7 +789,7 @@ static void stm32_stdclockconfig(void) #if defined(CONFIG_STM32_IWDG) || defined(CONFIG_STM32_RTC_LSICLOCK) /* Low speed internal clock source LSI */ - stm32_rcc_enable_lsi(); + stm32_rcc_enablelsi(); #endif #if defined(STM32_USE_LSE) diff --git a/arch/arm/src/stm32wb/stm32wb_rcc.h b/arch/arm/src/stm32wb/stm32wb_rcc.h index 438138e0de7..b14844a88b2 100644 --- a/arch/arm/src/stm32wb/stm32wb_rcc.h +++ b/arch/arm/src/stm32wb/stm32wb_rcc.h @@ -31,7 +31,7 @@ #include "arm_internal.h" #include "chip.h" -#include "hardware/stm32wb_rcc.h" +#include "hardware/stm32_rcc.h" /**************************************************************************** * Pre-processor Definitions @@ -190,24 +190,24 @@ void stm32_clockenable(void); void stm32_rcc_enable_lse(void); /**************************************************************************** - * Name: stm32_rcc_enable_lsi + * Name: stm32_rcc_enablelsi * * Description: * Enable the Internal Low-Speed (LSI) RC Oscillator. * ****************************************************************************/ -void stm32_rcc_enable_lsi(void); +void stm32_rcc_enablelsi(void); /**************************************************************************** - * Name: stm32_rcc_disable_lsi + * Name: stm32_rcc_disablelsi * * Description: * Disable the Internal Low-Speed (LSI) RC Oscillator. * ****************************************************************************/ -void stm32_rcc_disable_lsi(void); +void stm32_rcc_disablelsi(void); /**************************************************************************** * Name: stm32_rcc_enable_hsi48 diff --git a/arch/arm/src/stm32wb/stm32wb_rcc_lsi.c b/arch/arm/src/stm32wb/stm32wb_rcc_lsi.c deleted file mode 100644 index 7dcdc39a50b..00000000000 --- a/arch/arm/src/stm32wb/stm32wb_rcc_lsi.c +++ /dev/null @@ -1,74 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32wb/stm32wb_rcc_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> - -#include "arm_internal.h" -#include "stm32wb_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enable_lsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enable_lsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSI1ON); - - /* Wait for the internal LSI oscillator to be stable. */ - - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSI1RDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disable_lsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disable_lsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSI1ON, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32wl5/CMakeLists.txt b/arch/arm/src/stm32wl5/CMakeLists.txt index b13a427ce34..ee8a4d6b07d 100644 --- a/arch/arm/src/stm32wl5/CMakeLists.txt +++ b/arch/arm/src/stm32wl5/CMakeLists.txt @@ -32,7 +32,6 @@ set(SRCS stm32wl5_serial.c stm32wl5_start.c stm32wl5_lse.c - stm32wl5_lsi.c stm32wl5_idle.c stm32wl5_pwr.c stm32wl5_tim.c diff --git a/arch/arm/src/stm32wl5/Make.defs b/arch/arm/src/stm32wl5/Make.defs index d61921e8c12..200082d4463 100644 --- a/arch/arm/src/stm32wl5/Make.defs +++ b/arch/arm/src/stm32wl5/Make.defs @@ -33,7 +33,7 @@ include common/stm32/Make.defs CHIP_CSRCS += stm32wl5_allocateheap.c stm32wl5_exti_gpio.c stm32wl5_gpio.c CHIP_CSRCS += stm32wl5_irq.c stm32wl5_lowputc.c stm32wl5_rcc.c CHIP_CSRCS += stm32wl5_serial.c stm32wl5_start.c -CHIP_CSRCS += stm32wl5_lse.c stm32wl5_lsi.c stm32wl5_idle.c +CHIP_CSRCS += stm32wl5_lse.c stm32wl5_idle.c CHIP_CSRCS += stm32wl5_pwr.c stm32wl5_tim.c stm32wl5_flash.c stm32wl5_timerisr.c CHIP_CSRCS += stm32wl5_spi.c diff --git a/arch/arm/src/stm32wl5/hardware/stm32wl5_rcc.h b/arch/arm/src/stm32wl5/hardware/stm32_rcc.h similarity index 99% rename from arch/arm/src/stm32wl5/hardware/stm32wl5_rcc.h rename to arch/arm/src/stm32wl5/hardware/stm32_rcc.h index 987fed3348f..48a23d43d4e 100644 --- a/arch/arm/src/stm32wl5/hardware/stm32wl5_rcc.h +++ b/arch/arm/src/stm32wl5/hardware/stm32_rcc.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32wl5/hardware/stm32wl5_rcc.h + * arch/arm/src/stm32wl5/hardware/stm32_rcc.h * * SPDX-License-Identifier: Apache-2.0 * diff --git a/arch/arm/src/stm32wl5/stm32wl5_lsi.c b/arch/arm/src/stm32wl5/stm32wl5_lsi.c deleted file mode 100644 index 12ce587823d..00000000000 --- a/arch/arm/src/stm32wl5/stm32wl5_lsi.c +++ /dev/null @@ -1,73 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32wl5/stm32wl5_lsi.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "arm_internal.h" -#include "stm32wl5_rcc.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rcc_enablelsi - * - * Description: - * Enable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_enablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSION); - - /* Wait for the internal LSI oscillator to be stable. */ - - while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSIRDY) == 0); -} - -/**************************************************************************** - * Name: stm32_rcc_disablelsi - * - * Description: - * Disable the Internal Low-Speed (LSI) RC Oscillator. - * - ****************************************************************************/ - -void stm32_rcc_disablelsi(void) -{ - /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION - * bit the RCC CSR register. - */ - - modifyreg32(STM32_RCC_CSR, RCC_CSR_LSION, 0); - - /* LSIRDY should go low after 3 LSI clock cycles */ -} diff --git a/arch/arm/src/stm32wl5/stm32wl5_rcc.h b/arch/arm/src/stm32wl5/stm32wl5_rcc.h index eea97c6d240..a3a7f30e79a 100644 --- a/arch/arm/src/stm32wl5/stm32wl5_rcc.h +++ b/arch/arm/src/stm32wl5/stm32wl5_rcc.h @@ -32,7 +32,7 @@ #include "arm_internal.h" #include "chip.h" -#include "hardware/stm32wl5_rcc.h" +#include "hardware/stm32_rcc.h" /**************************************************************************** * Pre-processor Definitions
