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commit 7c498e8f4914cd6c4fbafaa93c324ea33b6c7275 Author: zhangyuan29 <[email protected]> AuthorDate: Fri Feb 7 19:01:36 2025 +0800 arch/tricore: unified mem barrier interface Use the common UP_DSB()/UP_ISB() barrier macros from arch/barriers.h instead of calling the __dsync()/__isync() intrinsics directly. Signed-off-by: zhangyuan29 <[email protected]> --- arch/tricore/src/common/tricore_csa.c | 5 +++-- arch/tricore/src/common/tricore_doirq.c | 3 ++- arch/tricore/src/common/tricore_svcall.c | 5 +++-- 3 files changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/tricore/src/common/tricore_csa.c b/arch/tricore/src/common/tricore_csa.c index d68ea4ae215..239bd745a10 100644 --- a/arch/tricore/src/common/tricore_csa.c +++ b/arch/tricore/src/common/tricore_csa.c @@ -32,6 +32,7 @@ #include <nuttx/arch.h> #include <nuttx/tls.h> +#include <arch/barriers.h> #include <arch/irq.h> #include "tricore_internal.h" @@ -54,7 +55,7 @@ uintptr_t *tricore_alloc_csa(uintptr_t pc, uintptr_t sp, /* DSYNC instruction should be executed immediately prior to the MTCR */ - __dsync(); + UP_DSB(); pucsa = (uintptr_t *)tricore_csa2addr(plcsa[REG_UPCXI]); @@ -62,7 +63,7 @@ uintptr_t *tricore_alloc_csa(uintptr_t pc, uintptr_t sp, /* ISYNC instruction executed immediately following MTCR */ - __isync(); + UP_ISB(); memset(pucsa, 0, TC_CONTEXT_SIZE); memset(plcsa, 0, TC_CONTEXT_SIZE); diff --git a/arch/tricore/src/common/tricore_doirq.c b/arch/tricore/src/common/tricore_doirq.c index 19f01934dee..c711702c6e8 100644 --- a/arch/tricore/src/common/tricore_doirq.c +++ b/arch/tricore/src/common/tricore_doirq.c @@ -34,6 +34,7 @@ #include <nuttx/addrenv.h> #include <nuttx/board.h> +#include <arch/barriers.h> #include <arch/board/board.h> #include <sched/sched.h> @@ -106,7 +107,7 @@ IFX_INTERRUPT_INTERNAL(tricore_doirq, 0, 255) *running_task = tcb; __mtcr(CPU_PCXI, tricore_addr2csa(tcb->xcp.regs)); - __isync(); + UP_ISB(); } /* Set irq flag */ diff --git a/arch/tricore/src/common/tricore_svcall.c b/arch/tricore/src/common/tricore_svcall.c index 02a639038b9..7177861fc99 100644 --- a/arch/tricore/src/common/tricore_svcall.c +++ b/arch/tricore/src/common/tricore_svcall.c @@ -32,6 +32,7 @@ #include <nuttx/debug.h> #include <syscall.h> +#include <arch/barriers.h> #include <arch/irq.h> #include <sched/sched.h> #include <nuttx/sched.h> @@ -65,7 +66,7 @@ void tricore_svcall(volatile void *trap) /* DSYNC instruction should be executed immediately prior to the MTCR */ - __dsync(); + UP_DSB(); regs = tricore_csa2addr((uintptr_t)regs); @@ -94,7 +95,7 @@ void tricore_svcall(volatile void *trap) case SYS_restore_context: *running_task = tcb; regs[REG_UPCXI] = tricore_addr2csa(tcb->xcp.regs); - __isync(); + UP_ISB(); break; default:
