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commit 60ceb7ac487c3ff60c035ae2be1953c73a6c4cbe
Author: Vignesh Pandian <[email protected]>
AuthorDate: Mon Nov 2 19:00:21 2026 +0530

    arch/arm/armv8-m: Set reserved exception vectors to NULL
    
    The Armv8-M Architecture Reference Manual (Sections B3.9 and B3.30)
    specifies that reserved exception vector slots (7-10 and 13) must be set
    to 0.
    
    Previously, NuttX initialized all exception vector slots up to
    NVIC_IRQ_PENDSV with exception_common, including the reserved slots.
    
    On NXP MCXN devices, the ROM bootloader checks flash offsets 0x20-0x34
    for an image header before jumping to the application. If these reserved
    entries contain non-zero values, the bootloader treats the image as
    invalid and falls back to ISP mode.
    
    This change sets the reserved vector entries to NULL, allowing the ROM
    bootloader to correctly recognize and boot the application.
    
    Signed-off-by: Vignesh Pandian <[email protected]>
---
 arch/arm/src/armv8-m/arm_vectors.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/arch/arm/src/armv8-m/arm_vectors.c 
b/arch/arm/src/armv8-m/arm_vectors.c
index 8e9a409817e..c17de5dc4ac 100644
--- a/arch/arm/src/armv8-m/arm_vectors.c
+++ b/arch/arm/src/armv8-m/arm_vectors.c
@@ -103,9 +103,17 @@ const void * const _vectors[] locate_data(".vectors")
 
   start,
 
-  /* Vectors 2 - n point directly at the generic handler */
-
-  [2 ... NVIC_IRQ_PENDSV] = &exception_common,
-  [(NVIC_IRQ_PENDSV + 1) ... (15 + ARMV8M_PERIPHERAL_INTERRUPTS)]
-                          = &exception_direct
+  /* Vectors 2 - n point directly at the generic handler.
+   * Reserved slots (7 in Non-Secure, 8-10, and 13) are left unassigned,
+   * which C guarantees to be zero-initialized (NULL).
+   */
+
+  [NVIC_IRQ_NMI ... NVIC_IRQ_USAGEFAULT]    = &exception_common,
+#if defined(CONFIG_ARCH_TRUSTZONE_SECURE)
+  [NVIC_IRQ_SECUREFAULT]                    = &exception_common,
+#endif
+  [NVIC_IRQ_SVCALL ... NVIC_IRQ_DBGMONITOR] = &exception_common,
+  [NVIC_IRQ_PENDSV]                         = &exception_common,
+  [NVIC_IRQ_SYSTICK ... (15 + ARMV8M_PERIPHERAL_INTERRUPTS)]
+                                            = &exception_direct
 };

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