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commit 4b3f2bd29c6f82f164a3da0d13d875d8d9dd7da9 Author: raiden00pl <[email protected]> AuthorDate: Tue Nov 3 09:57:28 2026 +0100 boards/nucleo-f410rb: Define the LPTIM1 kernel clock. LPTIM1 runs on PCLK1, the reset value of RCC_DCKCFGR2 LPTIM1SEL. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: raiden00pl <[email protected]> --- boards/arm/stm32f4/nucleo-f410rb/include/board.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/boards/arm/stm32f4/nucleo-f410rb/include/board.h b/boards/arm/stm32f4/nucleo-f410rb/include/board.h index 7cd3dcfa5b9..3b592995ad4 100644 --- a/boards/arm/stm32f4/nucleo-f410rb/include/board.h +++ b/boards/arm/stm32f4/nucleo-f410rb/include/board.h @@ -130,6 +130,10 @@ #define STM32_TIM9_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_TIM11_CLKIN (STM32_PCLK2_FREQUENCY) +/* LPTIM1 kernel clock is PCLK1 (RCC_DCKCFGR2 LPTIM1SEL reset value) */ + +#define STM32_LPTIM1_CLKIN (STM32_PCLK1_FREQUENCY) + /* DMA Channel/Stream Selections ********************************************/ /* Stream selections are arbitrary for now but might become important in the
