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commit 5da8aaa06c4884605ba8a33bfd37d67eff4cf11b Author: raiden00pl <[email protected]> AuthorDate: Wed Nov 11 10:14:47 2026 +0100 arch/arm/stm32n6: Add I2C. Select the common I2C driver for I2C1-4 and add the I2C pinmap. Assisted-by: Claude:claude-fable-5-1 Signed-off-by: raiden00pl <[email protected]> --- Documentation/platforms/arm/stm32n6/index.rst | 2 +- arch/arm/src/stm32n6/Kconfig | 5 ++++ arch/arm/src/stm32n6/hardware/stm32n6xxx_pinmap.h | 34 +++++++++++++++++++++++ 3 files changed, 40 insertions(+), 1 deletion(-) diff --git a/Documentation/platforms/arm/stm32n6/index.rst b/Documentation/platforms/arm/stm32n6/index.rst index 3786a5b0a24..7aa634dca13 100644 --- a/Documentation/platforms/arm/stm32n6/index.rst +++ b/Documentation/platforms/arm/stm32n6/index.rst @@ -26,6 +26,7 @@ The following list indicates peripherals supported in NuttX: Peripheral Support Notes ========== ======= =============================================== GPIO Yes +I2C Yes I2C1-4 through the common I2C v2 driver. EXTI Yes GPIO interrupts through the common driver. DMA Yes GPDMA1 and HPDMA1 through the common GPDMA driver. PWR Yes Supply configuration, VOS, I/O supply validity. @@ -41,7 +42,6 @@ ADC No DCACHE No DCMIPP No ETH No -I2C No ICACHE No IWDG No LPTIM No diff --git a/arch/arm/src/stm32n6/Kconfig b/arch/arm/src/stm32n6/Kconfig index 9f7e6cde4c5..a6b8a095092 100644 --- a/arch/arm/src/stm32n6/Kconfig +++ b/arch/arm/src/stm32n6/Kconfig @@ -13,6 +13,7 @@ config STM32_N6_PERIPHERALS select STM32_HAVE_IP_DMA_GPDMA select STM32_HAVE_IP_EXTI_M33M55_V1 select STM32_HAVE_IP_GPIO_M33M55_V1 + select STM32_HAVE_IP_I2C_M33M55_V2 select STM32_HAVE_IP_TIMERS_V3 select STM32_HAVE_IP_USART_M33M55_V3 select STM32_HAVE_IP_DBGMCU_V8 @@ -23,6 +24,10 @@ config STM32_N6_PERIPHERALS select STM32_HAVE_DMA1 select STM32_HAVE_DMA2 select STM32_HAVE_GPDMA_SECURE + select STM32_HAVE_I2C1 + select STM32_HAVE_I2C2 + select STM32_HAVE_I2C3 + select STM32_HAVE_I2C4 select STM32_HAVE_LPTIM1 select STM32_HAVE_LPTIM2 select STM32_HAVE_LPTIM3 diff --git a/arch/arm/src/stm32n6/hardware/stm32n6xxx_pinmap.h b/arch/arm/src/stm32n6/hardware/stm32n6xxx_pinmap.h index 5068d99b975..e6046cc6a6d 100644 --- a/arch/arm/src/stm32n6/hardware/stm32n6xxx_pinmap.h +++ b/arch/arm/src/stm32n6/hardware/stm32n6xxx_pinmap.h @@ -46,6 +46,40 @@ * The driver will then automatically configure PE5 as the USART1 TX pin. */ +/* I2C1 */ + +#define GPIO_I2C1_SCL_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTE | GPIO_PIN5) +#define GPIO_I2C1_SCL_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTH | GPIO_PIN9) +#define GPIO_I2C1_SDA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTC | GPIO_PIN1) +#define GPIO_I2C1_SDA_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTE | GPIO_PIN6) +#define GPIO_I2C1_SMBA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN5) + +/* I2C2 */ + +#define GPIO_I2C2_SCL_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN10) +#define GPIO_I2C2_SCL_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTD | GPIO_PIN14) +#define GPIO_I2C2_SDA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN11) +#define GPIO_I2C2_SDA_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTD | GPIO_PIN4) +#define GPIO_I2C2_SDA_3 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTD | GPIO_PIN15) +#define GPIO_I2C2_SMBA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTB | GPIO_PIN12) +#define GPIO_I2C2_SMBA_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTD | GPIO_PIN3) + +/* I2C3 */ + +#define GPIO_I2C3_SCL_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN8) +#define GPIO_I2C3_SDA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTA | GPIO_PIN9) +#define GPIO_I2C3_SDA_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTC | GPIO_PIN9) +#define GPIO_I2C3_SMBA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTC | GPIO_PIN8) + +/* I2C4 */ + +#define GPIO_I2C4_SCL_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTC | GPIO_PIN10) +#define GPIO_I2C4_SCL_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTE | GPIO_PIN13) +#define GPIO_I2C4_SDA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTC | GPIO_PIN11) +#define GPIO_I2C4_SDA_2 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTD | GPIO_PIN11) +#define GPIO_I2C4_SDA_3 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTE | GPIO_PIN14) +#define GPIO_I2C4_SMBA_1 (GPIO_ALT | GPIO_AF4 | GPIO_OPENDRAIN | GPIO_PORTE | GPIO_PIN15) + /* LPUART1 */ #define GPIO_LPUART1_CTS_1 (GPIO_ALT | GPIO_AF3 | GPIO_PORTA | GPIO_PIN11)
