masayuki2009 commented on pull request #2916: URL: https://github.com/apache/incubator-nuttx/pull/2916#issuecomment-785415866
@patacongo It seems that rp2040 architecture is almost same as lc823450. Both have dual CPUs without CPU cache but have XIP cache for QSPI, so there is no cache coherency issues. As @btashton commented, rp2040 has a 16KB XIP cache that is used for instruction cache if the code is fetched from an external QSPI flash. Also, rp2040 has 64KB x 4banks + 4KB x 2 banks SRAM (total 264KB) that is not big but we can run NuttX on SRAM as well (see the nshsram configuration). Of course, the SRAM size is limited, it would be better to use QSPI for code and assign code to SRAM for a critical part such as interrupt handlers. The big difference between rp2040 and lc823450 is that rp2040 has word-striped SRAM. The datasheet says ``` 2.6.2 SRAM ... SRAM is mapped to system addresses starting at 0x20000000. The first 256kB address region is word-striped across the four larger banks, which provides a significant memory parallelism benefits for most use cases. ``` I think this is amazing to improve performance when both CPUs access the SRAM. ---------------------------------------------------------------- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
