zhuyanlinzyl commented on pull request #5336:
URL: https://github.com/apache/incubator-nuttx/pull/5336#issuecomment-1040260934
@Ouss4
I have try in this patch.
```
--- a/arch/xtensa/src/esp32/esp32_irq.c
+++ b/arch/xtensa/src/esp32/esp32_irq.c
@@ -472,6 +472,7 @@ void up_irqinitialize(void)
#endif
g_irqmap[XTENSA_IRQ_SWINT] = IRQ_MKMAP(0, ESP32_CPUINT_SOFTWARE1);
+ g_irqmap[XTENSA_IRQ_SWINT] = IRQ_MKMAP(1, ESP32_CPUINT_SOFTWARE1);
/* Initialize CPU interrupts */
--- a/arch/xtensa/src/esp32/esp32_cpustart.c
+++ b/arch/xtensa/src/esp32/esp32_cpustart.c
@@ -193,6 +193,14 @@ void xtensa_appcpu_start(void)
xtensa_attach_fromcpu0_interrupt();
+ /* Attach the timer interrupt */
+
+ irq_attach(XTENSA_IRQ_SWINT, (xcpt_t)xtensa_swint, NULL);
+
+ /* Enable the timer 0 CPU interrupt. */
+
+ up_enable_irq(XTENSA_IRQ_SWINT);
+
```
but `ESP32_CPUINT_SOFTWARE1` only map to CPU1 finally.
As g_irqmap is not g_irqmap[CONFIG_SMP_NCPUS]
So I think must use separate SWI interrupt pin for each CPU?
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