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commit 71ced1f1a98dc7cef31043c76efd61778ed47b62 Author: Ville Juven <[email protected]> AuthorDate: Tue Mar 29 16:37:19 2022 +0300 RISC-V: Implement skeleton for a per CPU structure It might be useful to store things in memory per CPU. The tricky part is that all CPUs run the same code and see the same memory, so some kind of centralized access is required. For now, the structure contains the hart id. Access to the structure elements is provided via sscratch, which is unique for every hart! --- arch/risc-v/Kconfig | 4 + arch/risc-v/src/common/riscv_cpuindex.c | 3 +- .../common/{riscv_cpuindex.c => riscv_percpu.c} | 89 ++++++++++++------ arch/risc-v/src/common/riscv_percpu.h | 104 +++++++++++++++++++++ 4 files changed, 171 insertions(+), 29 deletions(-) diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index 97c66bd..7eef93d 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -234,6 +234,10 @@ config ARCH_MPU_HAS_NAPOT bool "PMP supports NAPOT" default y if !PMP_HAS_LIMITED_FEATURES +config ARCH_CPU_COUNT + int "Amount of CPUs in SoC" + default 5 if ARCH_CHIP_MPFS + source "arch/risc-v/src/opensbi/Kconfig" source "arch/risc-v/src/common/Kconfig" diff --git a/arch/risc-v/src/common/riscv_cpuindex.c b/arch/risc-v/src/common/riscv_cpuindex.c index fe49065..5f06c2c 100644 --- a/arch/risc-v/src/common/riscv_cpuindex.c +++ b/arch/risc-v/src/common/riscv_cpuindex.c @@ -30,6 +30,7 @@ #include <nuttx/irq.h> #include "riscv_internal.h" +#include "riscv_percpu.h" /**************************************************************************** * Public Functions @@ -51,7 +52,7 @@ uintptr_t riscv_mhartid(void) #ifdef CONFIG_ARCH_USE_S_MODE /* Kernel is in S-mode */ -#error "Missing functionality..." + return riscv_percpu_get_hartid(); #else /* Kernel is in M-mode */ diff --git a/arch/risc-v/src/common/riscv_cpuindex.c b/arch/risc-v/src/common/riscv_percpu.c similarity index 51% copy from arch/risc-v/src/common/riscv_cpuindex.c copy to arch/risc-v/src/common/riscv_percpu.c index fe49065..25e4ef9 100644 --- a/arch/risc-v/src/common/riscv_cpuindex.c +++ b/arch/risc-v/src/common/riscv_percpu.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/risc-v/src/common/riscv_cpuindex.c + * arch/risc-v/src/common/riscv_percpu.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -23,62 +23,95 @@ ****************************************************************************/ #include <nuttx/config.h> +#include <nuttx/irq.h> -#include <stdint.h> +#include <arch/barriers.h> -#include <nuttx/arch.h> -#include <nuttx/irq.h> +#include <assert.h> +#include <stdint.h> #include "riscv_internal.h" +#include "riscv_percpu.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define HART_CNT (CONFIG_ARCH_CPU_COUNT) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct riscv_percpu_s g_scratch[HART_CNT]; /**************************************************************************** * Public Functions ****************************************************************************/ /**************************************************************************** - * Name: riscv_mhartid + * Name: riscv_percpu_init * * Description: - * Context aware way to query hart id + * Initialize the per CPU structures, should only be done on the boot + * hart. * - * Returned Value: - * Hart id + ****************************************************************************/ + +void riscv_percpu_init(void) +{ + int i; + + for (i = 0; i < HART_CNT; i++) + { + g_scratch[i].hartid = i; + } +} + +/**************************************************************************** + * Name: riscv_percpu_get_addr + * + * Description: + * Get add a hart to the per CPU area + * + * Input Parameters: + * hartid - Hart number * ****************************************************************************/ -uintptr_t riscv_mhartid(void) +void riscv_percpu_add_hart(uintptr_t hartid) { -#ifdef CONFIG_ARCH_USE_S_MODE - /* Kernel is in S-mode */ + /* Hart IDs go from 0...4 */ + + DEBUGASSERT(hartid < HART_CNT); -#error "Missing functionality..." + /* Set the scratch register value to point to the scratch area */ -#else - /* Kernel is in M-mode */ + WRITE_CSR(sscratch, &g_scratch[hartid]); - return READ_CSR(mhartid); -#endif + /* Make sure it sticks */ + + __DMB(); } /**************************************************************************** - * Name: up_cpu_index + * Name: riscv_percpu_get_hartid * * Description: - * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that - * corresponds to the currently executing CPU. - * - * Input Parameters: - * None + * Get harts own hartid by reading it from the per CPU area. This is safe + * to use from lower privilege modes (than M-mode). * * Returned Value: - * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that - * corresponds to the currently executing CPU. + * Hart id * ****************************************************************************/ -#ifdef CONFIG_SMP -int up_cpu_index(void) +uintptr_t riscv_percpu_get_hartid(void) { - return (int)riscv_mhartid(); + uintptr_t scratch = READ_CSR(sscratch); + + DEBUGASSERT(scratch >= (uintptr_t) &g_scratch && + scratch <= (uintptr_t) &g_scratch + sizeof(g_scratch)); + + return ((struct riscv_percpu_s *)scratch)->hartid; } -#endif diff --git a/arch/risc-v/src/common/riscv_percpu.h b/arch/risc-v/src/common/riscv_percpu.h new file mode 100644 index 0000000..ddb35a5 --- /dev/null +++ b/arch/risc-v/src/common/riscv_percpu.h @@ -0,0 +1,104 @@ +/**************************************************************************** + * arch/risc-v/src/common/riscv_percpu.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISC_V_SRC_COMMON_RISCV_PERCPU_H +#define __ARCH_RISC_V_SRC_COMMON_RISCV_PERCPU_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <arch/irq.h> + +#ifndef __ASSEMBLY__ +# include <stdint.h> +# include <nuttx/arch.h> +#endif /* __ASSEMBLY__ */ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef __ASSEMBLY__ +#define SCRATCH_HARTID_OFFSET (0 * INT_REG_SIZE) +#else +#define SCRATCH_HARTID_OFFSET offsetof(riscv_percpu_s, hartid) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Per CPU save area. Access to this structure can be gained via the + * supervisor scratch (sscratch) register. Prior to this, every CPU that + * wishes to access this information must call riscv_percpu_add_hart() which + * will set up sscratch to point to the CPUs own area + */ + +struct riscv_percpu_s +{ + uintptr_t hartid; /* Hart ID */ +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: riscv_percpu_init + * + * Description: + * Initialize the per CPU structures, should only be done on the boot + * hart. + * + ****************************************************************************/ + +void riscv_percpu_init(void); + +/**************************************************************************** + * Name: riscv_percpu_get_addr + * + * Description: + * Get add a hart to the per CPU area + * + * Input Parameters: + * hartid - Hart number + * + ****************************************************************************/ + +void riscv_percpu_add_hart(uintptr_t hartid); + +/**************************************************************************** + * Name: riscv_percpu_get_hartid + * + * Description: + * Get harts own hartid by reading it from the per CPU area. This is safe + * to use from lower privilege modes than M-mode. + * + * Returned Value: + * Hart id + * + ****************************************************************************/ + +uintptr_t riscv_percpu_get_hartid(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_RISC_V_SRC_COMMON_RISCV_PERCPU_H */
