This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
from 8f744592d5 Fix nuttx coding style
new 3b5c0c885f riscv/swint: Give the full tcb to the context switch routine
new b409d72e9d riscv/fpu: Restore correct lazy-FPU functionality
new 0ea9debfce riscv/riscv_fpu: Clear the full FPU status/control register
on boot
new 4a468b8d3b riscv/saveusercontext: Fix FPU state save
new 83105cfa49 sched/assert: Store table for all registers instead of
buffer
new d0fbf9883d riscv/lazyfpu: Add option to disable lazy FPU
new 61460efe3c riscv/qemu-rv: Add FPU support back to qemu-rv
new c126ee8468 sched/assert.c: Fix style check error
The 8 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/Kconfig | 41 ++++++++
arch/risc-v/Kconfig | 2 +
arch/risc-v/include/irq.h | 88 +++++++++-------
arch/risc-v/src/common/riscv_cpupause.c | 4 +-
arch/risc-v/src/common/riscv_exception_common.S | 4 -
arch/risc-v/src/common/riscv_exit.c | 2 +-
arch/risc-v/src/common/riscv_fork.c | 28 ++---
arch/risc-v/src/common/riscv_fork.h | 1 +
arch/risc-v/src/common/riscv_fpu.S | 116 ++++++++++++++++++---
arch/risc-v/src/common/riscv_internal.h | 57 ++++++++--
arch/risc-v/src/common/riscv_macros.S | 30 ------
arch/risc-v/src/common/riscv_saveusercontext.S | 5 +-
arch/risc-v/src/common/riscv_sigdeliver.c | 4 +-
arch/risc-v/src/common/riscv_swint.c | 21 ++--
arch/risc-v/src/common/riscv_switchcontext.c | 6 +-
arch/risc-v/src/common/supervisor/riscv_syscall.S | 4 -
.../qemu-rv/rv-virt/configs/citest/defconfig | 1 -
.../qemu-rv/rv-virt/configs/citest64/defconfig | 1 -
sched/misc/assert.c | 12 ++-
19 files changed, 295 insertions(+), 132 deletions(-)
