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commit 7d605551cd0b9b3cea686146b693a0f2e8541cf5
Author: Tiago Medicci Serrano <tiago.medi...@espressif.com>
AuthorDate: Tue Aug 8 10:20:15 2023 -0300
esp32s3/wifi: Enable peripheral interrupt to the same CPU interrupt
The low-level Wi-Fi driver registers two peripheral interrupts to
the same CPU interrupt. Although the registered ISR is the same for
both peripherals interrupt, it's needed to call `up_enable_irq` to
ensure that the interrupt matrix is being set accordingly.
Please note that the current implementation of the ESP32-S3's IRQ
driver - although allow us to set a callback for each IRQ, which
represents the peripherals interrupt - doesn't allow us to call
both callbacks when these IRQs refers to a same CPU interrupt.
`g_cpu0_intmap` (or `g_cpu1_intmap`) associates each CPU interrupt
to a single IRQ/peripheral and, then, when a CPU interrupt is
triggered, only the last registered IRQ's callback will be called.
This isn't a problem here because 1) the registered callback is the
same for both IRQ's (in fact, it considers the CPU interrupt) and
2) we know in advance which peripheral interrupts will be attached
to which CPU interrupt and, then, we can set them directly.
---
arch/xtensa/include/esp32s3/irq.h | 1 +
arch/xtensa/src/esp32s3/esp32s3_irq.c | 4 +++-
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c | 19 ++++++++++++++-----
3 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/arch/xtensa/include/esp32s3/irq.h
b/arch/xtensa/include/esp32s3/irq.h
index 45d2e0f4ad..ee9e6b799d 100644
--- a/arch/xtensa/include/esp32s3/irq.h
+++ b/arch/xtensa/include/esp32s3/irq.h
@@ -446,6 +446,7 @@
#define ESP32S3_CPUINT_NMISET 0x00004000
#define ESP32S3_CPUINT_MAC 0
+#define ESP32S3_CPUINT_PWR 0
#define ESP32S3_CPUINT_RWBLE 5
#define ESP32S3_CPUINT_TIMER0 6
#define ESP32S3_CPUINT_SOFTWARE0 7
diff --git a/arch/xtensa/src/esp32s3/esp32s3_irq.c
b/arch/xtensa/src/esp32s3/esp32s3_irq.c
index 278212c61d..428f8eb31b 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_irq.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_irq.c
@@ -431,6 +431,7 @@ void up_irqinitialize(void)
#ifdef CONFIG_ESP32S3_WIFI
g_irqmap[ESP32S3_IRQ_MAC] = IRQ_MKMAP(0, ESP32S3_CPUINT_MAC);
+ g_irqmap[ESP32S3_IRQ_PWR] = IRQ_MKMAP(0, ESP32S3_CPUINT_PWR);
#endif
#ifdef CONFIG_ESP32S3_BLE
@@ -445,7 +446,8 @@ void up_irqinitialize(void)
/* Reserve CPU0 interrupt for some special drivers */
#ifdef CONFIG_ESP32S3_WIFI
- g_cpu0_intmap[ESP32S3_CPUINT_MAC] = CPUINT_ASSIGN(ESP32S3_IRQ_MAC);
+ g_cpu0_intmap[ESP32S3_CPUINT_MAC] = CPUINT_ASSIGN(ESP32S3_IRQ_MAC);
+ g_cpu0_intmap[ESP32S3_CPUINT_PWR] = CPUINT_ASSIGN(ESP32S3_IRQ_PWR);
xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32S3_CPUINT_MAC);
#endif
diff --git a/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
b/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
index ccddf73815..d4fd889910 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c
@@ -740,14 +740,14 @@ static void esp_set_isr(int32_t n, void *f, void *arg)
struct irq_adpt *adapter;
int irq = n + XTENSA_IRQ_FIRSTPERIPH;
- wlinfo("n=%d f=%p arg=%p irq=%d\n", n, f, arg, irq);
+ wlinfo("n=%d f=%p arg=%p", n, f, arg);
if (g_irqvector[irq].handler &&
g_irqvector[irq].handler != irq_unexpected_isr)
{
wlinfo("irq=%d has been set handler=%p\n", irq,
g_irqvector[irq].handler);
- return ;
+ return;
}
tmp = sizeof(struct irq_adpt);
@@ -756,18 +756,26 @@ static void esp_set_isr(int32_t n, void *f, void *arg)
{
wlerr("Failed to alloc %d memory\n", tmp);
assert(0);
- return ;
+ return;
}
adapter->func = f;
adapter->arg = arg;
- ret = irq_attach(irq, esp_int_adpt_cb, adapter);
+ ret = irq_attach(ESP32S3_IRQ_MAC, esp_int_adpt_cb, adapter);
if (ret)
{
wlerr("Failed to attach IRQ %d\n", irq);
assert(0);
- return ;
+ return;
+ }
+
+ ret = irq_attach(ESP32S3_IRQ_PWR, esp_int_adpt_cb, adapter);
+ if (ret)
+ {
+ wlerr("Failed to attach IRQ %d\n", irq);
+ assert(0);
+ return;
}
}
@@ -792,6 +800,7 @@ static void esp32s3_ints_on(uint32_t mask)
wlinfo("INFO mask=%08x irq=%d\n", mask, irq);
up_enable_irq(ESP32S3_IRQ_MAC);
+ up_enable_irq(ESP32S3_IRQ_PWR);
}
/****************************************************************************
