cbalint13 opened a new pull request, #15761:
URL: https://github.com/apache/tvm/pull/15761

   Hi folks,
   
   This PR adds helper functions to query any LLVM information about: targets, 
arches and it's features.
   It can enhance TVM target handling with information about LLVM architecture, 
just like partially was done in: #15685
   
   ---
   #### Changes:
   
    * Introduces ```llvm_get_targets()```, ```llvm_get_cpu_archlist()```, 
```llvm_get_cpu_features()```& ```llvm_cpu_has_features()```
    * Extends  current ```target_has_feature()``` to work with *any* target  
(not only x86), also adds ```-mtriple``` awareness
    * Exposes booth C/FFI & PY interfaced for all the functions mentioned above.
    * Adds new unit tests for the function logic and API consistency stress.
    * Ensures proper API compatibility with older LLVM, tested with 
LLVM={10,14,15,16,17}.
   
   ---
   
   #### Usage example (on LLVM17):
   
   * List all LLVM **targets**:
   ````
   print( tvm.target.codegen.llvm_get_targets() )
   
   ["arm", "armeb", "aarch64", "aarch64_be", "aarch64_32", "avr", "bpfel", 
"bpfeb", "hexagon", 
   "loongarch32", "loongarch64", "mips", "mipsel", "mips64", "mips64el", 
"msp430", "powerpc", 
   "powerpcle", "powerpc64", "powerpc64le", "r600", "amdgcn", "riscv32", 
"riscv64", "sparc", 
   "sparcv9", "sparcel", "s390x", "thumb", "thumbeb", "i386", "x86_64", 
"xcore", "nvptx", 
   "nvptx64", "lanai", "wasm32", "wasm64"]
   ````
   
   * List all **cpu architectures** for a specific **target**:
   ```
   print( tvm.target.codegen.llvm_get_cpu_archlist("hexagon") )
   
   ["generic", "hexagonv5", "hexagonv55", "hexagonv60", "hexagonv62", 
"hexagonv65", 
   "hexagonv66", "hexagonv67", "hexagonv67t", "hexagonv68", "hexagonv69", 
"hexagonv71", 
   "hexagonv71t", "hexagonv73"]
   
   print( tvm.target.codegen.llvm_get_cpu_archlist("hexagon") )
   
   ["generic", "generic-rv32", "generic-rv64", "rocket", "rocket-rv32", 
"rocket-rv64", 
   "sifive-7-series",  "sifive-e20", "sifive-e21", "sifive-e24", "sifive-e31", 
"sifive-e34", 
   "sifive-e76", "sifive-s21", "sifive-s51", "sifive-s54", "sifive-s76", 
"sifive-u54", 
   "sifive-u74", "sifive-x280", "syntacore-scr1-base",  "syntacore-scr1-max"]
   ```
   * List all **cpu features** for a specific **cpu architecture** for a 
specific **target**:
   ```
   print( tvm.target.codegen.llvm_get_cpu_features("aarch64", "neoverse-v2"))
   
   [ "altnzcv", "am", "bf16", "bti", "ccdp", "ccidx", "ccpp", "complxnum", 
"crc", "dit", "dotprod", 
   "el2vmsa", "el3", "enable-select-opt", "ete", "flagm", "fp-armv8", 
"fp16fml", "fptoint", 
   "fullfp16", "fuse-aes", "i8mm", "jsconv", "lor", "lse", "lse2", "lsl-fast", 
"mec", "mpam", "mte", 
   "neon", "neoversev2", "nv", "pan", "pan-rwv", "pauth", "perfmon", 
"predictable-select-expensive", 
   "predres", "rand", "ras", "rcpc", "rcpc-immo", "rdm", "rme", "sb", "sel2", 
"spe", "specrestrict", 
   "ssbs", "sve", "sve2", "sve2-bitperm", "tlb-rmi", "tracev8.4", "trbe", 
"uaops", "use-postra-scheduler",
    "use-scalar-inc-vl", "v8.1a", "v8.2a", "v8.3a", "v8.4a", "v8.5a", "v8a", 
"v9a", "vh"]
   ```
   
   * Multiple features query:
   ```
   $ cat tvm-check-avx512bw.py
   #!/usr/bin/python3
   
   import tvm
   from tvm.target import codegen
   from tvm.target.x86 import target_has_features
   
   import logging
   logging.basicConfig(level=logging.DEBUG)
   
   for mcpu in codegen.llvm_get_cpu_archlist("x86_64"):
     with tvm.target.Target("llvm -mcpu=%s" % mcpu):
       if target_has_features("avx512bw"):
         has_avx512f = target_has_features("avx512f")
         print("ARCH [%s] having `avx512bw` has avx512f=[%i]" % (mcpu, 
has_avx512f))
   
   $ ./tvm-check-avx512bw.py 
   ARCH [cannonlake] having `avx512bw` has avx512f=[1]
   ARCH [cascadelake] having `avx512bw` has avx512f=[1]
   ARCH [cooperlake] having `avx512bw` has avx512f=[1]
   ARCH [emeraldrapids] having `avx512bw` has avx512f=[1]
   ARCH [graniterapids] having `avx512bw` has avx512f=[1]
   ARCH [graniterapids-d] having `avx512bw` has avx512f=[1]
   ARCH [graniterapids_d] having `avx512bw` has avx512f=[1]
   ARCH [icelake-client] having `avx512bw` has avx512f=[1]
   ARCH [icelake-server] having `avx512bw` has avx512f=[1]
   ARCH [icelake_client] having `avx512bw` has avx512f=[1]
   ARCH [icelake_server] having `avx512bw` has avx512f=[1]
   ARCH [rocketlake] having `avx512bw` has avx512f=[1]
   ARCH [sapphirerapids] having `avx512bw` has avx512f=[1]
   ARCH [skx] having `avx512bw` has avx512f=[1]
   ARCH [skylake-avx512] having `avx512bw` has avx512f=[1]
   ARCH [skylake_avx512] having `avx512bw` has avx512f=[1]
   ARCH [tigerlake] having `avx512bw` has avx512f=[1]
   ARCH [x86-64-v4] having `avx512bw` has avx512f=[1]
   ARCH [znver4] having `avx512bw` has avx512f=[1]
   
   ```
   
   ---
   
   Cc: @kparzysz-quic , @Lunderberg , @areusch , @junrushao , @tqchen , 
@elvin-n , @vvchernov , @echuraev
   
   Thank you,
   ~Cristian.
   
   


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