adstraw commented on code in PR #10905:
URL: https://github.com/apache/tvm/pull/10905#discussion_r847809305
##########
tests/python/contrib/test_hexagon/test_cache_read_write.py:
##########
@@ -38,33 +37,49 @@ def intrin_mem_copy(shape, dtype, dst_scope, src_scope):
dtype,
scope=src_scope,
offset_factor=1,
+ name="mem_copy_src_buffer",
)
dst_buffer = tvm.tir.decl_buffer(
shape,
dtype,
scope=dst_scope,
offset_factor=1,
+ name="mem_copy_dst_buffer",
)
+ zero_indices = [0 for _ in shape]
+
def intrin_func(ins, outs):
ib = tvm.tir.ir_builder.create()
_src = ins[0]
_dst = outs[0]
+
+ dst_handle = ib.buffer_ptr(dst_buffer)
+ src_handle = ib.buffer_ptr(src_buffer)
+
ib.emit(
tvm.tir.call_intrin(
- "handle", "tir.mem_copy", _dst.access_ptr("w"),
_src.access_ptr("r"), size
+ "handle",
+ "tir.mem_copy",
+ tvm.tir.call_intrin("handle", "tir.address_of",
dst_handle[zero_indices]),
+ tvm.tir.call_intrin("handle", "tir.address_of",
src_handle[zero_indices]),
+ size,
)
)
return ib.get()
return te.decl_tensor_intrin(dst.op, intrin_func, binds={src: src_buffer,
dst: dst_buffer})
+def layout_transform_2d(n):
+ return [n // 16, te.AXIS_SEPARATOR, n % 16]
+
+
@requires_hexagon_toolchain
def test_cache_read_write(hexagon_session):
Review Comment:
Done
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