masahi commented on PR #80:
URL: https://github.com/apache/tvm-rfcs/pull/80#issuecomment-1159995066

   Thanks @wrongtest for questions!
   
   > What is the main purpose of async_scope annotation? It is for explicit 
semantic representation, or useful hint to lowering analysis, or would affect 
final codegen in CUDA?
   
   I've added a section explaining what `async_scope` is for. My intention is 
indeed more of "useful hint to lowering analysis, or would affect final codegen 
in CUDA". In particular, it is not used for sync insertion at all. I wouldn't 
call it "semantic representation", but it does make things explicit for later 
passes and also helps when eyeballing TIR dumps :)
   
   > If we only have data dependencies instead of the explicit control-flow 
dependency annotations, could we still reach the same point of proper 
synchronizations?
   
   What do you mean by "the explicit control-flow dependency annotations" here? 
From the given annotation, we obviously need to determine read-write 
dependencies to tell which stmt is the consumer of which async stmt. In that 
sense, I think I'm already working with data dependencies only. I don't think 
the TIR software transform pass deals with control flow at all.
   
   > For async_commit_stage/async_wait_stage, could I understand that they are 
the standard tir intrinsic in stage pipeline settings, and the only things for 
vendors to care about is how to lowering / codegen them?
   
   Yes, if I understand your question, async_commit_stage/async_wait_stage are 
new TIR intrinsics:
   
https://github.com/masahi/tvm/blob/4f40d1de6aa00ddaa709d0a21e6685cb9e9f57af/include/tvm/tir/builtin.h#L673-L674
   
   They are generated during sync insertion, and each backend can specify how 
to lower them, for example in cuda: 
   
https://github.com/masahi/tvm/blob/4f40d1de6aa00ddaa709d0a21e6685cb9e9f57af/src/target/source/intrin_rule_cuda.cc#L244-L248
   
   
   


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