lhutton1 commented on code in PR #12950:
URL: https://github.com/apache/tvm/pull/12950#discussion_r985592946
##########
src/relay/backend/contrib/cmsisnn/relay_to_tir.cc:
##########
@@ -133,6 +133,22 @@ class RelayToTIRVisitor : public MixedModeMutator {
} else {
conv2d_call = requantize_input;
}
+ int32_t dtype_bits =
conv2d_call->args[0]->type_as<TensorTypeNode>()->dtype.bits();
+
+ // Determine bitwidth of buffers based on input dtype
+ int32_t input_bits = 8;
+ int32_t filter_bits = 8;
+ int32_t bias_bits = 32;
+ int32_t output_bits = 8;
+ int32_t context_buffer_bits = 8;
+ bool is_int16 = false;
+ if (dtype_bits == 16) {
+ is_int16 = true;
+ input_bits = 16;
+ bias_bits = 64;
+ output_bits = 16;
+ context_buffer_bits = 16;
+ }
Review Comment:
Happy to leave :)
##########
tests/python/contrib/test_cmsisnn/test_conv2d.py:
##########
@@ -249,23 +256,25 @@ def test_conv2d_symmetric_padding_int8(
kernel_size = (3, 3)
strides = (1, 1)
dilation = (1, 1)
- dtype = "int8"
groups = 1
- weight_format = "HWIO"
+ input_zero_point = input_zero_point if dtype == "int8" else 0
Review Comment:
Ah I see thanks! Seems like there should be a check in the partitioning for
this case
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