wrongtest-intellif commented on code in PR #14021:
URL: https://github.com/apache/tvm/pull/14021#discussion_r1142862499
##########
src/tir/transforms/compact_buffer_region.cc:
##########
@@ -247,37 +218,61 @@ class BufferAccessRegionCollector : public
StmtExprVisitor {
}
// Step 6. Update buffer_access_region_ from relaxed_accesses_ for inner
buffers.
for (const Buffer& buffer : op->alloc_buffers) {
- auto it = relaxed_accesses_.find(buffer);
- ICHECK(it != relaxed_accesses_.end())
- << buffer << " is allocated but not accessed within block scope";
- const NDIntSet& nd_int_set = it->second;
- buffer_access_region_[buffer] =
SimplifyAndNarrowBufferRegionFromNDIntSet(
- nd_int_set, buffer->shape, &dom_analyzer_, ancestor_loops_);
+ SimplifyAndNarrowBufferRegionFromNDIntSet(buffer);
}
}
void VisitStmt_(const BlockRealizeNode* op) final {
- PrimExpr cur_predicate = predicate_in_scope;
- predicate_in_scope = op->predicate;
+ With<ConditionalBoundsContext> ctx(op->predicate, &dom_map_, &hint_map_,
&pending_conditions_);
+ StmtExprVisitor::VisitStmt_(op);
+ }
+
+ void VisitStmt_(const DeclBufferNode* op) final {
Review Comment:
After some thinking we decide to switch to `Allocate` as the buffer def
point, thus not depend on `DeclBuffer`.
That is, if we have
```python
data = T.allocate(...)
for i in range(10):
...
X = T.decl_buffer(..., data=data)
for j in range(10):
# access X[i, j]
```
The region is relaxed wrt scope of `i` instead of `j`, since we actually
want to mutate allocation regions.
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: [email protected]
For queries about this service, please contact Infrastructure at:
[email protected]
