Date: Fri, 24 Oct 2003 19:02:39 +0100 From: Stuart Bell <[EMAIL PROTECTED]>
On Friday, October 24, 2003, at 06:39 PM, Jeff Walther wrote:
So why all the pins on the IIfx memory? Does anyone know?
If you google for this h/w note, it casts some light on the subject:
HW25-Mac Mem Configurations.pdf
Parity is implemented using a PLA on the motherboard. Apple offered details of the pin-outs to developers, but warned against 3rd parties trying to implement parity.
I have that one stored away on my hard drive. It's one of my favorites. My reading of the IIfx section is that the parity checking is an option which Apple might install, by installing a PLA which implements parity checking, but that Apple won't release the details of how the PLA works, therefore developer shouldn't develop a chip of their own to go there--or some such. In any case, on a X 8 SIMM, parity should only add a single bit to the SIMM, or one wire. Even 30 pin SIMMs can support parity.
Of course, it's conceivable that Apple intended some kind of Error Correction SIMM scheme that would need more pins, but I think the lack of discussion of that desirable feature makes it far fetched.
Another source of data might be via the HP printer that also used those SIMMs. Anything on the HP site?
I haven't checked that.
Jeff Walther
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