On Tue, 2 Dec 2025 05:59:53 GMT, Jatin Bhateja <[email protected]> wrote:
>> Intel® AVX10 ISA [1] extensions added new floating point comparison >> instructions. They set the EFLAGS register so that relationships can be >> tested independently to avoid extra checks when one of the inputs is NaN. >> >> Most of the work is covered in the architecture definition (`x86.ad`) file. >> A new comparison operand was created to be used by new CMove and JMP >> definitions with the APX specific portions of the CMove section being >> updated to rely on the new instructions because both sets of instructions >> are always expected to be available on the same platform. New floating point >> comparison definitions were also added. >> >> This change uses the new AVX10.2 (UCOMXSS or UCOMXSD) instructions on >> supported platforms to avoid the extra handling required with existing >> (UCOMISS or UCOMISD) instructions. To make sure no new failures were >> introduced, tier1, tier2, and tier3 tests were run on builds with and >> without the changes. Additionally, the JTREG tests listed below were used to >> verify correctness with `-XX:-UseAPX` / `-XX:+UseAPX` options. The baseline >> build used is [OpenJDK >> v26-b26](https://github.com/openjdk/jdk/releases/tag/jdk-26%2B26). >> >> 1. `jtreg:test/hotspot/jtreg/compiler/c2/irTests/CMoveLConstants.java` >> 2. `jtreg:test/hotspot/jtreg/compiler/c2/irTests/TestFPComparison.java` >> 3. >> `jtreg:test/hotspot/jtreg/compiler/intrinsics/math/TestSignumIntrinsic.java` >> 4. `jtreg:test/hotspot/jtreg/compiler/vectorization/TestSignumVector.java` >> >> Finally, the JMH micro-benchmark listed below was updated to separately >> exercise CMove and JMP code paths. >> >> 1. `micro:test/micro/org/openjdk/bench/java/lang/FPComparison.java` >> >> [1] >> https://www.intel.com/content/www/us/en/content-details/856721/intel-advanced-vector-extensions-10-2-intel-avx10-2-architecture-specification.html?wapkw=AVX10 > > src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp line 2069: > >> 2067: } else { >> 2068: __ ucomiss(reg1, opr2->as_xmm_float_reg()); >> 2069: } > > Please create a new macro assembly routine for this if-else idiom, its > getting repeated multiple times. FYI, this portion could be split into a separate PR. However, I created a couple of macros so that you can check and verify if they match what you are thinking of. ------------- PR Review Comment: https://git.openjdk.org/jdk/pull/28337#discussion_r2612392221
