On Jan 14, 2008 5:30 PM, Jouni Mettälä <[EMAIL PROTECTED]> wrote:

>
>
> On Jan 14, 2008 4:25 PM, Uwe Hermann <[EMAIL PROTECTED]> wrote:
>
> > On Sun, Jan 13, 2008 at 09:08:17PM +0200, Jouni Mettälä wrote:
> > >  It now boots with filo. This time with different filo Config file. #
> > means
> > > these lines were commented out.
> >
> > What did you change to make FILO boot from your disk?
> >
> I am not sure if commenting
> #SUPPORT_PCI = 1
> #PCI_BRUTE_SCAN = 1
> out or adding
> DEBUG_ALL = 1
> or using just fallback image instead of normal and fallback affected this.
>
>
>
> > Keyboard isn't working yet. Tested ps/2 keyboard. Using kernel as boot
> file
>
> Does a USB keyboard work? (does the board have onboard-USB?)
>
>
> I'll test USB keyboard as soon as possible (I'll hope today)
>
> >
> > Some of the 440BX boards have problems with the PS/2 keyboard, I haven't
> > yet found out if it's superio-related or some more general problem in
> > the code somewhere...
> >
> >
> > Please check the patch for the Abit BE6-II V2.0 I just (re)posted. Is
> > your board identical to that one or is it really the "BE6" (without
> > "II" or "V2.0")? If it's not exactly the same, please post some more
> > information about it, e.g. 'lspci -tvnn', 'superiotool -dV', 'flashrom
> > -V',
> > and the output of 'getpir' (a file called 'irq_table.c').
> >
> >   ide_search_updated.patch didn't make keyboard working.
> There reads ABIT-BE6 without II or V2
>
> Files added using original bios.
>
> >  <http://www.unmaintained-free-software.org>
> >
>

Attachment: flashrom-V
Description: Binary data

/* This file was generated by getpir.c, do not modify!
 * (but if you do, please run checkpir on it to verify)
 *
 * Contains the IRQ Routing Table dumped directly from your
 * memory, which BIOS sets up.
 *
 * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx
 */

#ifdef GETPIR
#include "pirq_routing.h"
#else
#include <arch/pirq_routing.h>
#endif

const struct irq_routing_table intel_irq_routing_table = {
	PIRQ_SIGNATURE,  /* u32 signature */
	PIRQ_VERSION,    /* u16 version   */
	32+16*8,	 /* There can be total 8 devices on the bus */
	0x00,		 /* Where the interrupt router lies (bus) */
	(0x07<<3)|0x0,   /* Where the interrupt router lies (dev) */
	0xc00,		 /* IRQs devoted exclusively to PCI usage */
	0x8086,		 /* Vendor */
	0x7000,		 /* Device */
	0,		 /* Crap (miniport) */
	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
	0xb1,		 /* u8 checksum. This has to be set to some
			    value that would give 0 after the sum of all
			    bytes for this structure (including checksum) */
	{
		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
		{0x00,(0x0f<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
		{0x00,(0x0d<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
		{0x00,(0x0b<<3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
		{0x00,(0x09<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
		{0x00,(0x11<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x5, 0x0},
		{0x00,(0x13<<3)|0x0, {{0x62, 0xdeb8}, {0x62, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x6, 0x0},
		{0x00,(0x07<<3)|0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
		{0x00,(0x01<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
	}
};

Attachment: lspci-tvnn
Description: Binary data

Attachment: superiotool-dV
Description: Binary data

-- 
coreboot mailing list
[email protected]
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to