On 04.08.2008 12:41, Stefan Reinauer wrote: > Carl-Daniel Hailfinger wrote: > >> Hi, >> >> this problem has been mentioned by me in the past, but I'd like to >> remind people of it now that we're working on a M57SLI port to v3. >> >> The LAR code and lots of other places can't cope with partially mapped >> ROMs. There are two options: >> >> > Are you talking about ROMs that can not be mapped completely at all? >
Yes. > Have you encountered any of these anywhere? If so I would like to know > what systems that were. > Gigabyte M57SLI rev 2.0 uses the LPC-to-SPI translation feature of the IT8716F which can only map the top (not a movable window!) 512 kBytes of the SPI chip in memory space. There's an additional 128 kByte region (from 4G-1152kB to 4G-1024kB, not movable) which is sort of a "register space" compatibility feature. Everything outside these "standard" areas needs to be read with explicit read commands in 3-byte chunks. So any modded M57SLI with a chip greater than 512kB has this problem. I tried every possible undocumented workaround to no avail, and contacted ITE with no response. > In any other case, the bootblock's duty is to enable full mapping of the > chip. > Fully agreed. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
