On 04.08.2008 14:13, Ward Vandewege wrote: > On Mon, Aug 04, 2008 at 01:58:47PM +0200, Carl-Daniel Hailfinger wrote: > >> Gigabyte M57SLI rev 2.0 uses the LPC-to-SPI translation feature of the >> IT8716F which can only map the top (not a movable window!) 512 kBytes of >> the SPI chip in memory space. There's an additional 128 kByte region >> (from 4G-1152kB to 4G-1024kB, not movable) which is sort of a "register >> space" compatibility feature. Everything outside these "standard" areas >> needs to be read with explicit read commands in 3-byte chunks. >> >> So any modded M57SLI with a chip greater than 512kB has this problem. I >> tried every possible undocumented workaround to no avail, and contacted >> ITE with no response. >> > > There is a patch by Ronald Hoogeboom with a workaround, which allows booting > from larger rom chips: > > http://article.gmane.org/gmane.linux.bios/33492 > > I'd still like to put it in the tree. >
I'm no longer opposing to put this in v2 (v2 is already complicated and support for this will make it worse), but I shall make very sure that we use a clean solution in v3. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
