Author: rminnich
Date: 2008-08-11 00:02:15 +0200 (Mon, 11 Aug 2008)
New Revision: 732
Modified:
coreboot-v3/include/arch/x86/amd/k8/k8.h
coreboot-v3/include/device/pci_ids.h
Log:
Add needed defines for k8
Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Modified: coreboot-v3/include/arch/x86/amd/k8/k8.h
===================================================================
--- coreboot-v3/include/arch/x86/amd/k8/k8.h 2008-08-10 21:20:46 UTC (rev
731)
+++ coreboot-v3/include/arch/x86/amd/k8/k8.h 2008-08-10 22:02:15 UTC (rev
732)
@@ -298,6 +298,11 @@
#define RES_PORT_IO_32 0x20
#define RES_MEM_IO 0x40
+#define LinkConnected (1 << 0)
+#define InitComplete (1 << 1)
+#define NonCoherent (1 << 2)
+#define ConnectionPending (1 << 4)
+
#ifndef ASSEMBLY
/* cpu version -- no support for f0 yet */
static inline int is_cpu_rev_a0(void)
@@ -379,6 +384,7 @@
struct mem_controller {
unsigned node_id;
+ /* NOTE: these are in "BDF" format -- i.e. bus in upper 16, devfn in
upper 8 of lower 16 */
u32 f0, f1, f2, f3;
u32 channel0[DIMM_SOCKETS];
u32 channel1[DIMM_SOCKETS];
Modified: coreboot-v3/include/device/pci_ids.h
===================================================================
--- coreboot-v3/include/device/pci_ids.h 2008-08-10 21:20:46 UTC (rev
731)
+++ coreboot-v3/include/device/pci_ids.h 2008-08-10 22:02:15 UTC (rev
732)
@@ -141,7 +141,57 @@
/* Vendors and devices. Sort key: vendor first, device next. */
#define PCI_VENDOR_ID_AMD 0x1022
-#define PCI_DEVICE_ID_AMD_LXBRIDGE 0x2080
+#define PCI_VENDOR_ID_AMD 0x1022
+#define PCI_DEVICE_ID_AMD_LANCE 0x2000
+#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
+#define PCI_DEVICE_ID_AMD_LX 0x1054
+#define PCI_DEVICE_ID_AMD_SCSI 0x2020
+#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006
+#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007
+#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C
+#define PCI_DEVIDE_ID_AMD_FE_GATE_700D 0x700D
+#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E
+#define PCI_DEVICE_ID_AMD_FE_GATE_700F 0x700F
+#define PCI_DEVICE_ID_AMD_COBRA_7400 0x7400
+#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401
+#define PCI_DEVICE_ID_AMD_COBRA_7403 0x7403
+#define PCI_DEVICE_ID_AMD_COBRA_7404 0x7404
+#define PCI_DEVICE_ID_AMD_VIPER_7408 0x7408
+#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409
+#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B
+#define PCI_DEVICE_ID_AMD_VIPER_740C 0x740C
+#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410
+#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411
+#define PCI_DEVICE_ID_AMD_SB768_7440 0x7440
+#define PCI_DEVICE_ID_AMD_SB768_7441 0x7441
+#define PCI_DEVICE_ID_AMD_SB768_7443 0x7443
+#define PCI_DEVICE_ID_AMD_SB768_7448 0x7448
+#define PCI_DEVICE_ID_AMD_SB768_7449 0x7449
+#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413
+#define PCI_DEVICE_ID_AMD_VIPER_7414 0x7414
+#define PCI_DEVICE_ID_AMD_VIPER_7440 0x7440
+#define PCI_DEVICE_ID_AMD_VIPER_7441 0x7441
+#define PCI_DEVICE_ID_AMD_VIPER_7443 0x7443
+#define PCI_DEVICE_ID_AMD_VIPER_7448 0x7448
+#define PCI_DEVICE_ID_AMD_VIPER_7449 0x7449
+#define PCI_DEVICE_ID_AMD_8151_SYSCTRL 0x7454
+#define PCI_DEVICE_ID_AMD_8151_AGP 0x7455
+#define PCI_DEVICE_ID_AMD_8111_PCI 0x7460
+#define PCI_DEVICE_ID_AMD_8111_USB 0x7464
+#define PCI_DEVICE_ID_AMD_8111_ISA 0x7468
+#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469
+#define PCI_DEVICE_ID_AMD_8111_SMB 0x746a
+#define PCI_DEVICE_ID_AMD_8111_ACPI 0x746b
+#define PCI_DEVICE_ID_AMD_8111_NIC 0x7462
+#define PCI_DEVICE_ID_AMD_8111_USB2 0x7463
+#define PCI_DEVICE_ID_AMD_8131_PCIX 0x7450
+#define PCI_DEVICE_ID_AMD_8131_IOAPIC 0x7451
+#define PCI_DEVICE_ID_AMD_8132_PCIX 0x7458
+#define PCI_DEVICE_ID_AMD_8132_IOAPIC 0x7459
+#define PCI_DEVICE_ID_AMD_AES 0x2082
+#define PCI_DEVICE_ID_AMD_761_0 0x700E
+#define PCI_DEVICE_ID_AMD_761_1 0x700F
+#define PCI_DEVICE_ID_AMD_VIPER_7412 0x7412#define
PCI_DEVICE_ID_AMD_LXBRIDGE 0x2080
#define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090
#define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091
#define PCI_DEVICE_ID_AMD_CS5536_A0_IDE 0x2092
--
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