Author: rminnich
Date: 2008-08-11 00:05:08 +0200 (Mon, 11 Aug 2008)
New Revision: 733
Modified:
coreboot-v3/mainboard/gigabyte/m57sli/Makefile
coreboot-v3/mainboard/gigabyte/m57sli/initram.c
coreboot-v3/mainboard/gigabyte/m57sli/stage1.c
Log:
Fixes to mainboard to get it to build.
Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Modified: coreboot-v3/mainboard/gigabyte/m57sli/Makefile
===================================================================
--- coreboot-v3/mainboard/gigabyte/m57sli/Makefile 2008-08-10 22:02:15 UTC
(rev 732)
+++ coreboot-v3/mainboard/gigabyte/m57sli/Makefile 2008-08-10 22:05:08 UTC
(rev 733)
@@ -21,9 +21,15 @@
STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o \
$(obj)/mainboard/$(MAINBOARDDIR)/option_table.c \
- $(obj)/southbridge/nvidia/mcp55/stage1_smbus.o
+ $(obj)/southbridge/nvidia/mcp55/stage1_smbus.o \
+ $(obj)/mainboard/$(MAINBOARDDIR)/initram.o \
+ $(obj)/northbridge/amd/k8/raminit.o \
+ $(obj)/northbridge/amd/k8/coherent_ht.o \
+ $(obj)/northbridge/amd/k8/incoherent_ht.o
-INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c
+# I can't get this to work -- if you can fix it do so. The file above
+# from "initram" on should be here.
+INITRAM_SRC=
STAGE2_MAINBOARD_SRC =
Modified: coreboot-v3/mainboard/gigabyte/m57sli/initram.c
===================================================================
--- coreboot-v3/mainboard/gigabyte/m57sli/initram.c 2008-08-10 22:02:15 UTC
(rev 732)
+++ coreboot-v3/mainboard/gigabyte/m57sli/initram.c 2008-08-10 22:05:08 UTC
(rev 733)
@@ -29,6 +29,7 @@
#include <string.h>
#include <msr.h>
#include <io.h>
+#include <cpu.h>
#include <amd/k8/k8.h>
#include <spd.h>
Modified: coreboot-v3/mainboard/gigabyte/m57sli/stage1.c
===================================================================
--- coreboot-v3/mainboard/gigabyte/m57sli/stage1.c 2008-08-10 22:02:15 UTC
(rev 732)
+++ coreboot-v3/mainboard/gigabyte/m57sli/stage1.c 2008-08-10 22:05:08 UTC
(rev 733)
@@ -23,12 +23,29 @@
#include <lib.h>
#include <console.h>
#include <device/device.h>
+#include <cpu.h>
+#include <amd/k8/k8.h>
+#include <amd/k8/sysconf.h>
#include <device/pci.h>
#include <string.h>
#include <msr.h>
#include <io.h>
#include <arch/x86/msr.h>
+void memreset_setup(void)
+{
+}
+
+void memreset(int controllers, const struct mem_controller *ctrl)
+{
+}
+
+void activate_spd_rom(const struct mem_controller *ctrl)
+{
+ /* nothing to do */
+}
+
+
void hardware_stage1(void)
{
post_code(POST_START_OF_MAIN);
--
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