Author: rminnich
Date: 2008-08-11 17:55:05 +0200 (Mon, 11 Aug 2008)
New Revision: 738
Modified:
coreboot-v3/arch/x86/Kconfig
Log:
new defines for K8 and SMP
Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Modified: coreboot-v3/arch/x86/Kconfig
===================================================================
--- coreboot-v3/arch/x86/Kconfig 2008-08-11 13:23:40 UTC (rev 737)
+++ coreboot-v3/arch/x86/Kconfig 2008-08-11 15:55:05 UTC (rev 738)
@@ -56,6 +56,58 @@
arch/x86/Makefile for more hints on possible values.
It is usually set in mainboard/*/Kconfig.
+config K8_REV_F_SUPPORT
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Whether to include rev F support
+
+config K8_SCAN_PCI_BUS
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Whether to scan the PCI bus in stage1
+
+config K8_ALLOCATE_IO_RANGE
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Whether to allocate IO space in stage1
+
+config K8_ALLOCATE_MMIO_RANGE
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Whether to allocate MMIO space in stage1.
+ Comment from code:
+ Do we need allocate MMIO? Currently we direct
+ last 64M to southbridge link (sblink) only,
+ We can not lose access to last 4M range to ROM.
+
+config LOGICAL_CPUS
+ hex
+ default 1
+ help
+ How many logical CPUs there are. Fix me.
+
+config MAX_PHYSICAL_CPUS
+ hex
+ default 1
+ help
+ Max number of physical CPUs (sockets)
+
+config MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Config with 4 CPUs even if more are installed
+
+config CROSS_BAR_47_56
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Configure for the type of crossbar on the mainboard.
+
config OPTION_TABLE
boolean
help
@@ -93,3 +145,50 @@
default 0x8000 if CPU_AMD_K8
help
This option sets the size of the area used for CAR.
+
+# variables related to AMD Hypertransport.
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Hypertransport unit ID base value.
+ Mainboard-dependent.
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x20 if CPU_AMD_K8
+ help
+ Unit id of the end of hypertransport chain
+ (usually the real SB); if it is
+ less than than HT_CHAIN_UNITID_BASE,
+ it can be 0
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ hex
+ default 1 if CPU_AMD_K8
+ help
+ Determines (I don't understand; ask YHLU)
+ if only offset SB hypertransport chain
+
+config SB_HT_CHAIN_ON_BUS0
+ hex
+ default 0 if CPU_AMD_K8
+ help
+ Make SB hypertransport chain sit on bus 0, if it is 1,
+ will put sb ht chain on bus 0, if it is 2 will
+ put other chain on 0x40, 0x80, 0xc0
+
+
+config K8_HT_FREQ_1G_SUPPORT
+ hex
+ default 1 if CPU_AMD_K8
+ help
+ 1 Ghz. support. Opteron E0 or later can support
+ 1G HT, but still depends on the mainboard
+
+config HT_FREQ_800MHZ
+ hex
+ default 1 if CPU_AMD_K8
+ help
+ Can we run HT at 800 Mhz
+
--
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