Arne Georg Gleditsch wrote:
[EMAIL PROTECTED] writes:
Author: stepan
Date: 2008-08-20 11:17:30 +0200 (Wed, 20 Aug 2008)
New Revision: 3529

Modified:
   trunk/coreboot-v2/targets/tyan/s2912_fam10/Config-abuild.lb
Log:
this port seems somehow broken.. Now, is it using FAILOVER, or is it not?!

Hmm.  This was supposed to be more or less equivalent to the approach
taken by the serengeti_cheetah_fam10 target, but I see it isn't quite...

It works as it is (was), but I can have a look at it again if there are
stylistic issues.  I might not have exercised the abuild file, though --
what would be the recommended way of doing that so as to ensure that is
in correspondence with the regular config file?


This was my fault. I missed reviewing the abuild config.

This is now the same as serengeti_cheetah_fam10.

A little background information. The fam10 initialization is a bit larger than the K8 code. To make more room in the same 512K ROM that most platforms have the normal image was dropped. The other change is the use of failover. This makes the XIP CAR code live in only one place instead of in the fallback and normal images.

Arne, please test a s2912_fam10 abuild and ack this.

Marc



--
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:[EMAIL PROTECTED]
http://www.amd.com/embeddedprocessors
Fixup the abuild target to make the ROM that same way as the real target.


Signed-off-by: Marc Jones <[EMAIL PROTECTED]>

Index: coreboot-v2/targets/tyan/s2912_fam10/Config-abuild.lb
===================================================================
--- coreboot-v2.orig/targets/tyan/s2912_fam10/Config-abuild.lb  2008-08-20 
11:29:46.000000000 -0600
+++ coreboot-v2/targets/tyan/s2912_fam10/Config-abuild.lb       2008-08-20 
09:47:19.000000000 -0600
@@ -18,25 +18,30 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-target tyan_s2912_fam10
-mainboard tyan/s2912_fam10
+target VENDOR_MAINBOARD
+mainboard VENDOR/MAINBOARD
+
+option CC="CROSSCC"
+option CROSS_COMPILE="CROSS_PREFIX"
+option HOSTCC="CROSS_HOSTCC"
 
 __COMPRESSION__
 
-romimage "fallback"
-       option USE_FALLBACK_IMAGE=0
-       option ROM_IMAGE_SIZE=0x3f0000
-       option XIP_ROM_SIZE=0x40000
+option ROM_SIZE=1024*1024
+
+romimage "fallback" 
+       option USE_FALLBACK_IMAGE=1
+       option ROM_IMAGE_SIZE=0x3f000
        option COREBOOT_EXTRA_VERSION=".0-fallback"
        payload __PAYLOAD__
 end
 
-romimage "failover" 
-       option USE_FALLBACK_IMAGE=1
-       option ROM_IMAGE_SIZE=0x3f0000
-       option XIP_ROM_SIZE=0x40000
+romimage "failover"
+       option USE_FAILOVER_IMAGE=1
+       option USE_FALLBACK_IMAGE=0
+       option ROM_IMAGE_SIZE=FAILOVER_SIZE
+       option XIP_ROM_SIZE=FAILOVER_SIZE
        option COREBOOT_EXTRA_VERSION=".0-failover"
-       payload __PAYLOAD__
 end
 
 buildrom ./coreboot.rom ROM_SIZE "fallback" "failover"
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