Hello! I'm experimenting with alix.2c3 here, but have no luck. I tried coreboot v3 (r870, r898) with filo (r64, r80) and coreinfo (r3640) payloads (with libpayload r3640). All ends up with following:
last n-lines snippet (can do full log if it's needed) ....... Wrote coreboot table at: 0x00000500 - 0x00000bbc checksum 50f0 Show all devs... root(Root Device): enabled 1 have_resources 0 initialized 1 cpus: Unknown device path type: 0 cpus(): enabled 1 have_resources 0 initialized 0 apic_0(APIC: 00): enabled 1 have_resources 1 initialized 1 domain_0_pci_1_0(PCI: 00:01.0): enabled 1 have_resources 1 initialized 1 domain_0_pci_f_0(PCI: 00:0f.0): enabled 1 have_resources 1 initialized 1 domain_0_pci_f_2(PCI: 00:0f.2): enabled 1 have_resources 1 initialized 1 domain_0(PCI_DOMAIN: 0000): enabled 1 have_resources 1 initialized 0 dynamic PCI: 00:01.1(PCI: 00:01.1): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:01.2(PCI: 00:01.2): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:09.0(PCI: 00:09.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0a.0(PCI: 00:0a.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0b.0(PCI: 00:0b.0): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.3(PCI: 00:0f.3): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.4(PCI: 00:0f.4): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.5(PCI: 00:0f.5): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.6(PCI: 00:0f.6): enabled 1 have_resources 1 initialized 1 dynamic PCI: 00:0f.7(PCI: 00:0f.7): enabled 1 have_resources 1 initialized 1 Stage2 code done. LAR: Attempting to open 'normal/payload'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/[EMAIL PROTECTED], size 1200 LAR: seen member normal/initram/[EMAIL PROTECTED], size 5976 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 1 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 30700 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 841 LAR: seen member normal/payload/[EMAIL PROTECTED], size 1 LAR: seen member normal/payload/[EMAIL PROTECTED], size 15072 LAR: seen member blob/[EMAIL PROTECTED], size 30374 LAR: seen member [EMAIL PROTECTED], size 20480 LAR: File not found! LAR: Attempting to open 'normal/payload/segment0'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/[EMAIL PROTECTED], size 1200 LAR: seen member normal/initram/[EMAIL PROTECTED], size 5976 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 1 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 30700 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 841 LAR: seen member normal/payload/[EMAIL PROTECTED], size 1 LAR: CHECK normal/payload/segment0 @ 0xfff898f0 start 0xfff89940 len 1 reallen 183984 compression 3 entry 0x00101998 loadaddress 0x00109300 LAR: Compression algorithm #3 (zeroes) used LAR: Attempting to open 'normal/payload/segment1'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/[EMAIL PROTECTED], size 1200 LAR: seen member normal/initram/[EMAIL PROTECTED], size 5976 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 1 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 30700 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 841 LAR: seen member normal/payload/[EMAIL PROTECTED], size 1 LAR: seen member normal/payload/[EMAIL PROTECTED], size 15072 LAR: CHECK normal/payload/segment1 @ 0xfff89950 start 0xfff899a0 len 15072 reallen 37632 compression 1 entry 0x00101998 loadaddress 0x00100000 LAR: Compression algorithm #1 (lzma) used LAR: Attempting to open 'normal/payload/segment2'. LAR: Start 0xfff80000 len 0x80000 LAR: seen member normal/[EMAIL PROTECTED], size 1200 LAR: seen member normal/initram/[EMAIL PROTECTED], size 5976 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 1 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 30700 LAR: seen member normal/stage2/[EMAIL PROTECTED], size 841 LAR: seen member normal/payload/[EMAIL PROTECTED], size 1 LAR: seen member normal/payload/[EMAIL PROTECTED], size 15072 LAR: seen member blob/[EMAIL PROTECTED], size 30374 LAR: seen member [EMAIL PROTECTED], size 20480 LAR: File not found! LAR: load_file: No such file 'normal/payload/segment2' LAR: load_file_segments: All loaded, entry 0x00101998 ========== mainboard_pre_payload: done ========================================= and that's all, no matter what I tried, it just stops there Post code at this moment is 96, as per coreboot post_code.h this is: #define POST_STAGE2_ARCH_WRITE_TABLES_MIDDLE 0x96 Don't know what this actually means. Did anybody have this kind of problem? Is there any know-how to make it work? Or does it actually work at all? Regards, Roman -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
