On Tue, Oct 14, 2008 at 03:27:04PM -0500, Alex Mauer wrote: > Index: src/mainboard/bcom/winnetp680/Config.lb > =================================================================== > --- src/mainboard/bcom/winnetp680/Config.lb (revision 3654) > +++ src/mainboard/bcom/winnetp680/Config.lb (working copy) > @@ -99,16 +99,14 @@ > register "ide1_80pin_cable" = "0" > register "fn_ctrl_lo" = "0x80" > register "fn_ctrl_hi" = "0x1d" > - device pci a.0 on end # Firewire > - device pci f.0 on end # SATA > - device pci f.1 on end # IDE > - device pci 10.0 on end # OHCI > - device pci 10.1 on end # OHCI > - device pci 10.2 on end # OHCI > - device pci 10.3 on end # OHCI > + device pci f.0 on end # IDE > + device pci 10.0 on end # UHCI > + device pci 10.1 on end # UHCI > + device pci 10.2 on end # UHCI > + device pci 10.3 on end # UHCI > device pci 10.4 on end # EHCI > device pci 11.0 on # Southbridge LPC > - chip superio/fintek/f71805f # Super I/O > + chip superio/winbond/w83697hf # Super I/O > device pnp 2e.0 off # Floppy > io 0x60 = 0x3f0 > irq 0x70 = 6
At least the Super I/O parts are incorrect for the w83697hf, I talked with Alex on IRC about this, he'll post an updated patch today. Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
