See patch.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Drop unneeded enable_mainboard_devices() function, the lines
register "fn_ctrl_lo" = "0x80"
register "fn_ctrl_hi" = "0x1d"
in the Config.lb file should do exactly the same (but please test that)!
Also, drop some unused variables and (IMHO) unneeded debug messages.
Index: src/mainboard/bcom/winnetp680/Config.lb
===================================================================
--- src/mainboard/bcom/winnetp680/Config.lb (Revision 3666)
+++ src/mainboard/bcom/winnetp680/Config.lb (Arbeitskopie)
@@ -107,12 +107,12 @@
device pci 10.4 on end # EHCI
device pci 11.0 on # Southbridge LPC
chip superio/winbond/w83697hf # Super I/O
- device pnp 2e.0 off # Floppy
+ device pnp 2e.0 off # Floppy (N/A)
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
- device pnp 2e.1 on # Parallel Port
+ device pnp 2e.1 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
drq 0x74 = 3
Index: src/mainboard/bcom/winnetp680/auto.c
===================================================================
--- src/mainboard/bcom/winnetp680/auto.c (Revision 3666)
+++ src/mainboard/bcom/winnetp680/auto.c (Arbeitskopie)
@@ -39,6 +39,7 @@
#include "cpu/x86/lapic/boot_cpu.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "superio/winbond/w83697hf/w83697hf_early_serial.c"
+
#define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
static void memreset_setup(void)
@@ -52,33 +53,6 @@
#include "northbridge/via/cn700/raminit.c"
-static void enable_mainboard_devices(void)
-{
- device_t dev;
- u8 reg;
-
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
- if (dev == PCI_DEV_INVALID)
- die("Southbridge not found!!!\n");
-
- /* bit=0 means enable function (per CX700 datasheet)
- * 5 16.1 USB 2
- * 4 16.0 USB 1
- * 3 15.0 SATA and PATA
- * 2 16.2 USB 3
- * 1 16.4 USB EHCI
- */
- pci_write_config8(dev, 0x50, 0x80);
-
- /* bit=1 means enable internal function (per CX700 datasheet)
- * 3 Internal RTC
- * 2 Internal PS2 Mouse
- * 1 Internal KBC Configuration
- * 0 Internal Keyboard Controller
- */
- pci_write_config8(dev, 0x51, 0x1d);
-}
-
static const struct mem_controller ctrl = {
.d0f0 = 0x0000,
.d0f2 = 0x2000,
@@ -91,37 +65,24 @@
static void main(unsigned long bist)
{
- unsigned long x;
- device_t dev;
-
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
w83697hf_set_clksel_48(SERIAL_DEV);
-
w83697hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
-
enable_smbus();
smbus_fixup(&ctrl);
- if (bist == 0) {
- print_debug("doing early_mtrr\r\n");
+ if (bist == 0)
early_mtrr_init();
- }
/* Halt if there was a built-in self test failure. */
report_bist_failure(bist);
- print_debug("Enabling mainboard devices\r\n");
- enable_mainboard_devices();
-
ddr_ram_setup(&ctrl);
/* ram_check(0, 640 * 1024); */
-
- print_spew("Leaving auto.c:main()\r\n");
}
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot