On Tue, Oct 28, 2008 at 10:34 AM, Myles Watson <[EMAIL PROTECTED]> wrote:
> > > ./coherent_ht.c:#ifdef CONFIG_K8_HT_FREQ_1G_SUPPORT
> >
> > we only support f2 or later. This should die.
>
> All right.
>
> > > ./coherent_ht.c:#if CONFIG_LOGICAL_CPUS==1
> >
> > Ditto. That should be dead.
>
> I'll take it out
>
>
Signed-off-by: Myles Watson <[EMAIL PROTECTED]>
Thanks,
Myles
Index: mainboard/amd/serengeti/defconfig
===================================================================
--- mainboard/amd/serengeti/defconfig (revision 956)
+++ mainboard/amd/serengeti/defconfig (working copy)
@@ -40,7 +40,6 @@
CONFIG_K8_SCAN_PCI_BUS=0
CONFIG_K8_ALLOCATE_IO_RANGE=0
CONFIG_K8_ALLOCATE_MMIO_RANGE=0
-CONFIG_LOGICAL_CPUS=1
CONFIG_MAX_PHYSICAL_CPUS=1
CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED=0
CONFIG_CROSS_BAR_47_56=0
@@ -50,7 +49,6 @@
CONFIG_CARBASE=0xc8000
CONFIG_CARSIZE=0x8000
CONFIG_CBMEMK=0x2000
-CONFIG_K8_HT_FREQ_1G_SUPPORT=1
CONFIG_HT_FREQ_800MHZ=1
CONFIG_APIC_ID_OFFSET=0x10
Index: mainboard/amd/serengeti/initram.c
===================================================================
--- mainboard/amd/serengeti/initram.c (revision 958)
+++ mainboard/amd/serengeti/initram.c (working copy)
@@ -181,7 +181,7 @@
setup_coherent_ht_domain(); // routing table and start other core0
wait_all_core0_started();
-#if CONFIG_LOGICAL_CPUS==1
+
// It is said that we should start core1 after all core0 launched
/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
* So here need to make sure last core0 is started, esp for two way system,
@@ -189,7 +189,6 @@
*/
start_all_cores();
wait_all_other_cores_started(bsp_apicid);
-#endif
/* it will set up chains and store link pair for optimization later */
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
Index: mainboard/amd/dbm690t/initram.c
===================================================================
--- mainboard/amd/dbm690t/initram.c (revision 958)
+++ mainboard/amd/dbm690t/initram.c (working copy)
@@ -139,7 +139,7 @@
setup_coherent_ht_domain(); // routing table and start other core0
wait_all_core0_started();
-#if CONFIG_LOGICAL_CPUS==1
+
// It is said that we should start core1 after all core0 launched
/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
* So here need to make sure last core0 is started, esp for two way system,
@@ -147,7 +147,6 @@
*/
start_all_cores();
wait_all_other_cores_started(bsp_apicid);
-#endif
/* it will set up chains and store link pair for optimization later */
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
Index: mainboard/gigabyte/m57sli/initram.c
===================================================================
--- mainboard/gigabyte/m57sli/initram.c (revision 956)
+++ mainboard/gigabyte/m57sli/initram.c (working copy)
@@ -98,7 +98,7 @@
setup_coherent_ht_domain(); // routing table and start other core0
wait_all_core0_started();
-#if CONFIG_LOGICAL_CPUS==1
+
// It is said that we should start core1 after all core0 launched
/* because optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
* So here need to make sure last core0 is started, esp for two way system,
@@ -106,7 +106,6 @@
*/
start_all_cores();
wait_all_other_cores_started(bsp_apicid);
-#endif
/* it will set up chains and store link pair for optimization later */
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
Index: northbridge/amd/k8/coherent_ht.c
===================================================================
--- northbridge/amd/k8/coherent_ht.c (revision 958)
+++ northbridge/amd/k8/coherent_ht.c (working copy)
@@ -287,19 +287,6 @@
freq_cap = pci_conf1_read_config16(dev, pos);
freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
-#ifdef CONFIG_K8_HT_FREQ_1G_SUPPORT
- {
- return freq_cap;
- }
-#endif
-
- id = pci_conf1_read_config32(dev, 0);
-
- /* AMD K8 Unsupported 1Ghz? */
- if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
- freq_cap &= ~(1 << HT_FREQ_1000Mhz);
- }
-
return freq_cap;
}
@@ -660,10 +647,8 @@
void setup_uniprocessor(void)
{
printk(BIOS_SPEW, "Enabling UP settings\n");
-#if CONFIG_LOGICAL_CPUS==1
unsigned tmp = (pci_conf1_read_config32(NODE_MC(0), 0xe8) >> 12) & 3;
if (tmp>0) return;
-#endif
disable_probes();
}
@@ -1568,7 +1553,6 @@
}
#endif /* CONFIG_MAX_PHYSICAL_CPUS > 1 */
-#if CONFIG_LOGICAL_CPUS==1
unsigned verify_dualcore(unsigned nodes)
{
unsigned node, totalcpus, tmp;
@@ -1582,13 +1566,11 @@
return totalcpus;
}
-#endif
void coherent_ht_finalize(unsigned nodes)
{
unsigned node;
int dual_core = 0;
-#if CONFIG_LOGICAL_CPUS==1
unsigned total_cpus;
get_option(&dual_core, "dual_core");
@@ -1598,7 +1580,6 @@
else {
total_cpus = nodes;
}
-#endif
/* set up cpu count and node count and enable Limit
* Config Space Range for all available CPUs.
@@ -1615,11 +1596,7 @@
/* Set the Total CPU and Node count in the system */
val = pci_conf1_read_config32(dev, 0x60);
val &= (~0x000F0070);
-#if CONFIG_LOGICAL_CPUS==1
val |= ((total_cpus-1)<<16)|((nodes-1)<<4);
-#else
- val |= ((nodes-1)<<16)|((nodes-1)<<4);
-#endif
pci_conf1_write_config32(dev, 0x60, val);
/* Only respond to real cpu pci configuration cycles
Index: northbridge/amd/k8/cpu.c
===================================================================
--- northbridge/amd/k8/cpu.c (revision 958)
+++ northbridge/amd/k8/cpu.c (working copy)
@@ -56,7 +56,6 @@
unsigned nb_cfg_54;
unsigned siblings;
int e0_later_single_core;
- int disable_siblings;
nb_cfg_54 = 0;
sysconf.enabled_apic_ext_id = 0;
@@ -67,11 +66,6 @@
bsp_apicid = lapicid();
sysconf.apicid_offset = bsp_apicid;
- disable_siblings = !CONFIG_LOGICAL_CPUS;
-#if CONFIG_LOGICAL_CPUS == 1
- get_option(&disable_siblings, "dual_core");
-#endif
-
// for pre_e0, nb_cfg_54 can not be set, ( even set, when you read it still be 0)
// How can I get the nb_cfg_54 of every node' nb_cfg_54 in bsp??? and differ d0 and e0 single core
@@ -164,7 +158,7 @@
}
unsigned jj;
- if(e0_later_single_core || disable_siblings) {
+ if(e0_later_single_core) {
jj = 0;
} else
{
Index: arch/x86/amd/model_fxx/init_cpus.c
===================================================================
--- arch/x86/amd/model_fxx/init_cpus.c (revision 958)
+++ arch/x86/amd/model_fxx/init_cpus.c (working copy)
@@ -68,10 +68,6 @@
/* The get_nodes function is defined in northbridge/amd/k8/coherent_ht.c */
nodes = get_nodes();
- /* if the get_option fails siblings remain disabled. */
- // This sound not be a config option. disable_siblings = !CONFIG_LOGICAL_CPUS;
- //get_option(&disable_siblings, "dual_core");
-
/* There is an interesting problem in different steppings. See page 373. The interpretation of the
* APIC ID bits is different. To determine which order is used, check bit 54 of the programmers' guide
* here we assume that all nodes are the same stepping.
@@ -447,7 +443,7 @@
unsigned timeout = 1;
unsigned loop = 100;
#if K8_SET_FIDVID == 1
-#if (CONFIG_LOGICAL_CPUS == 1) && (K8_SET_FIDVID_CORE0_ONLY == 1)
+#if K8_SET_FIDVID_CORE0_ONLY == 1
if (id.coreid == 0) // only need set fid for core0
#endif
init_fidvid_ap(bsp_apicid, apicid);
--
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