On 12.11.2008 19:06, Mart Raudsepp wrote: > artecgroup/dbe61: Set up NAND and USB power handling settings > > Also upper-cases the hex in lpc_serirq_polarity as all other Geode boards > have it as such, > and remove parts of the commented out reference v2 setup block that should be > handled by > this change now. > > Oddly enough the USB power handling setting (that was to get the other pair > of USB > ports powered during DBE62 work) actually make memtest work, while without it > it gets > unexpected interrupt halts. The SPD commit earlier missed this local change > as an unrelated > one. >
The paragraph above is a bit unclear to me. What's the relationship between memtest and the other pair of USB ports? Do they both work now or is it an "either or" decision? > Signed-off-by: Mart Raudsepp <[EMAIL PROTECTED]> > With an improved working of the commit message, this is Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]> Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
