Hi, Yes, the processor is running in the real mode, both HDT(AMD debug tool) and machine code can verify it. The prefix of 0x66 indicates a 32bit instruction to the processor which is running in the real mode, however, the processor still executes the instructions in the 16bit way. I will check how to support 32bit instruction set in the real mode. And the code of wakeup.S is put here by Linux for resuming. When system resumes, the processor must be in the real mode, but you can see there are some 32bit instruction from either the assembly code or the machine code.
Best Regards ??? Feng Libo @ AMD Ext: 20906 Mobile Phone: 13683249071 Office Phone: 0086-010-62801406 -----Original Message----- From: ron minnich [mailto:[EMAIL PROTECTED] Sent: Tuesday, November 25, 2008 1:10 AM To: Feng, Libo Cc: [email protected]; Huang, FrankR; Li, Maggie; Bao, Zheng; Wang, Qingpei; Xie, Michael Subject: Re: [coreboot] ACPI S3 On Sun, Nov 23, 2008 at 11:02 PM, Feng, Libo <[EMAIL PROTECTED]> wrote: > > Hi, All, > > I am still trying to implement the S3 state in dbm690t. Now I can jump into > the waking vector code running under the real mode. However, the code > contains some 32bit instructions, when these instructions are executed, the > system always hangs, for the processor thought they were of 16bit. Please see > the code in the below link. > > http://lxr.linux.no/linux+v2.6.18/arch/x86_64/kernel/acpi/wakeup.S > > In 37 and 38 line, there are two 32bit instructions, > > 66 6a 00 pushl $0 # Kill any dangerous flags > 66 9d popfl > > You can see the machine codes starting with 0x66 indicating these 32bit > instructions. However, processor always thought these were of 16bit, so, > instructions are changed into: > > 66 6a push byte 00h > 00 66 9d add [bp-63h], ah > what could explain this is that you are not in 16-bit mode, you are actually in 32-bit mode for some reason. The 66 will then run these instructions in 16 bit. That is just a guess. Are you certain you are in 16 bit mode? ron -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
