Hmm my test computer does not have check-and-send plugin, so I forgot the
attachment. Sorry.
Rudolf Marek wrote:
Hello all,
The K8M890 BIOS needs int 0x15 0x5f18 to write to scratch register for a
driver the memory size of framebuffer and also the memory speed. The
X.org openchrome driver as well Unichrome driver needs that.
Signed-off-by: Rudolf Marek <[email protected]>
Thanks,
Rudolf
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diff --git a/src/vgahooks.c b/src/vgahooks.c
index 7c229ba..86050fd 100644
--- a/src/vgahooks.c
+++ b/src/vgahooks.c
@@ -5,6 +5,9 @@
// This file may be distributed under the terms of the GNU GPLv3 license.
#include "bregs.h" // set_fail
+#include "biosvar.h" //GET_GLOBAL
+#include "pci.h" //pci_
+#include "pci_ids.h" //ids
#include "util.h" // handle_155f
#include "config.h" // CONFIG_*
@@ -14,6 +17,7 @@ handle_155f01(struct bregs *regs)
regs->eax = 0x5f;
regs->cl = 2; // panel type = 2 = 1024 * 768
set_success(regs);
+ dprintf(1, "Warning: Panel type is hardcoded\n");
}
static void
@@ -24,11 +28,77 @@ handle_155f02(struct bregs *regs)
regs->cx = 0x401; // PAL + crt only
regs->dx = 0; // TV Layout - default
set_success(regs);
+ dprintf(1, "Warning: TV/CRT output type is hardcoded\n");
+}
+
+/* ECX = unknown/dont care
+ EBX[3..0] FB size 1 = 8MB 2=16MB ...
+ EBX[7..4] Memory speed:
+ 0: SDR 66Mhz
+ 1: SDR 100Mhz
+ 2: SDR 133Mhz
+ 3: DDR 100Mhz (PC1600 or DDR200)
+ 4: DDR 133Mhz (PC2100 or DDR266)
+ 5: DDR 166Mhz (PC2700 or DDR333)
+ 6: DDR 200Mhz (PC3200 or DDR400)
+ Guesses (confirmed)
+ 7: DDR2 100Mhz (DDR2 400)
+ 8: DDR2 133Mhz (DDR2 533)
+ 9: DDR2 166Mhz (DDR2 667)
+ A: DDR2 200Mhz (DDR2 800)
+ B: DDR2 233Mhz (DDR2 1066)
+ C: and above: Unknown
+ EBX[?..8] Total memory size?
+ EAX = 0x5C for success
+
+ K8M890 BIOS wants only this call (Desktop NoTv)
+*/
+
+static u8 mem_power[] = {0, 3, 4, 5, 6, 7, 8, 9};
+
+/* 0 is not handled */
+static int handle_155f18_k8m890(struct bregs *regs) {
+ int bdf;
+ u8 reg;
+ /* 0MB - 512MB */
+
+ bdf = pci_find_device(PCI_VENDOR_ID_VIA, 0x3336); /* K8M890 supported so far */
+
+ if (bdf < 0)
+ return 0;
+ /* FB config */
+ reg = pci_config_readb(bdf, 0xa1);
+
+ /* GFX disabled ? */
+ if (!(reg & 0x80))
+ return 0;
+
+ regs->ebx = GET_GLOBAL(mem_power[(reg >> 4) & 0x7]);
+
+ bdf = pci_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL); /* get the memory speed */
+
+ if (bdf < 0)
+ return 0;
+
+ /* mem clk 0 = DDR2 400 */
+ reg = pci_config_readb(bdf, 0x94) & 0x7;
+ regs->ebx |= ((reg + 7) << 4);
+ regs->eax = 0x5f;
+ dprintf(1, "Detected VIA framebufer size %dMB, memory grade DDR2-%d\n",
+ 1 << (regs->ebx & 0xf), ((reg * 133) + 400));
+
+ set_success(regs);
+ return 1;
}
static void
handle_155f18(struct bregs *regs)
{
+ if (handle_155f18_k8m890(regs))
+ return;
+
+ dprintf(1, "Warning: Memory clock speed is hardcoded\n");
+
regs->eax = 0x5f;
regs->ebx = 0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
regs->ecx = 0x060;
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