On Thu, Jan 8, 2009 at 11:00 AM, Ward Vandewege <[email protected]> wrote:
> On Thu, Jan 08, 2009 at 08:52:44AM -0700, Myles Watson wrote:
>> On Thu, Jan 8, 2009 at 6:58 AM, Ward Vandewege <[email protected]> wrote:
>> > On Wed, Jan 07, 2009 at 09:39:39PM -0700, Myles Watson wrote:
>> >> > The rev that broke the boot was 1089 or 1090. 1089 does not build, so I
>> >> > can't
>> >> > tell for sure. 1088 boots fine. 1090 is broken.
>> >>
>> >> They might have well been the same commit because they were
>> >> interdependent. It was just an easier way of looking at the changes
>> >> for me.
>> >>
>> >> Thanks for tracking it down. Could you send me a log from 1088?
>> >> Hopefully we can track it down quickly.
>> >
>> > Sure, see attached.
>>
>> The biggest difference that I see is that there is no graphics device
>> (PCI 1.1) in the broken one. In 1088 it was found dynamically (not in
>> the tree), but now it isn't found at all.
>>
>> Since it was supposed to be disabled by:
>> /* this board does not really have vga; disable it (pci device
>> 00:01.1) */
>> unwanted_vpci = < 80000900 0 >;
>> in the dts, I'm not sure why it disappeared now.
>>
>> Possible solution:
>> - Try it again without the unwanted_vpci line in the dts.
>>
>> I guess I don't understand why the device is gone now. I didn't think
>> the changes I've made would make the device disappear.
>
> I have not tried that yet, but here's a boot log from v1108, which still does
> not boot but it stops in a different place now, it seems.
Thanks for your patience. One problem is that there is no area
reserved for the APIC and the ROM. I think we should add a reserved
resource in the domain that goes from 0xfc000000-0xffffffff. That
will stop allocations from going there.
I copied the reserved areas from i440bx_emulation. Like the comments
say, I know these need to be reserved areas, but I'm not exactly sure
where they belong.
Compile tested.
Signed-off-by: Myles Watson <[email protected]>
Thanks,
Myles
Index: svn/northbridge/amd/geodelx/geodelx.c
===================================================================
--- svn.orig/northbridge/amd/geodelx/geodelx.c
+++ svn/northbridge/amd/geodelx/geodelx.c
@@ -149,8 +149,28 @@ static void geodelx_northbridge_set_reso
*/
static void geodelx_pci_domain_read_resources(struct device *dev)
{
+ struct resource *res;
+
/* If the domain has any specific resources, read them here. */
pci_domain_read_resources(dev);
+
+ /* Reserve space for the IOAPIC. This should be in the Southbridge,
+ * but I couldn't tell which device to put it in. */
+ res = new_resource(dev, 2);
+ res->base = 0xfec00000UL;
+ res->size = 0x100000UL;
+ res->limit = 0xffffffffUL;
+ res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |
+ IORESOURCE_ASSIGNED;
+
+ /* Reserve space for the LAPIC. There's one in every processor, but
+ * the space only needs to be reserved once, so we do it here. */
+ res = new_resource(dev, 3);
+ res->base = 0xfee00000UL;
+ res->size = 0x10000UL;
+ res->limit = 0xffffffffUL;
+ res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED |
+ IORESOURCE_ASSIGNED;
}
/**
--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot
