Second attempt with the spaces fixed.
Signed-off-by: Dan Lykowski <[email protected]>
Dan Lykowski
--- On Thu, 1/8/09, Bao, Zheng <[email protected]> wrote:
From: Bao, Zheng <[email protected]>
Subject: Re: [coreboot] [patch] Proposed patch for FIDVID question
To: "Dan Lykowski" <[email protected]>, "Marc Jones"
<[email protected]>
Cc: "Coreboot" <[email protected]>
Date: Thursday, January 8, 2009, 9:44 PM
It works on dbm690t and pistachio. Please note some indents are spaces instead
of tabs. Please correct it.
Zheng
Acked-by: Zheng Bao <[email protected]>
Index: src/mainboard/amd/pistachio/cache_as_ram_auto.c
===================================================================
--- src/mainboard/amd/pistachio/cache_as_ram_auto.c (revision 3850)
+++ src/mainboard/amd/pistachio/cache_as_ram_auto.c (working copy)
@@ -155,6 +155,7 @@
int needs_reset = 0;
u32 bsp_apicid = 0;
msr_t msr;
+ struct cpuid_result cpuid1;
struct sys_info *sysinfo =
(struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE -
DCACHE_RAM_GLOBAL_VAR_SIZE);
@@ -198,17 +199,27 @@
post_code(0x04);
- msr = rdmsr(0xc0010042);
- printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ /* Check to see if processor is capable of changing FIDVID */
+ /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+ cpuid1 = cpuid(0x80000007);
+ if( (cpuid1.edx & 0x6) == 0x6 ) {
- enable_fid_change();
- enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
- init_fidvid_bsp(bsp_apicid);
+ /* Read FIDVID_STATUS */
+ msr=rdmsr(0xc0010042);
+ printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
- // show final fid and vid
- msr = rdmsr(0xc0010042);
- printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ enable_fid_change();
+ enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
+ init_fidvid_bsp(bsp_apicid);
+ /* show final fid and vid */
+ msr=rdmsr(0xc0010042);
+ printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+
+ } else {
+ printk_debug("Changing FIDVID not supported\n");
+ }
+
post_code(0x05);
needs_reset = optimize_link_coherent_ht();
Index: src/mainboard/amd/dbm690t/cache_as_ram_auto.c
===================================================================
--- src/mainboard/amd/dbm690t/cache_as_ram_auto.c (revision 3850)
+++ src/mainboard/amd/dbm690t/cache_as_ram_auto.c (working copy)
@@ -161,6 +161,7 @@
int needs_reset = 0;
u32 bsp_apicid = 0;
msr_t msr;
+ struct cpuid_result cpuid1;
struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE);
@@ -197,17 +198,27 @@
rs690_early_setup();
sb600_early_setup();
- msr=rdmsr(0xc0010042);
- printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ /* Check to see if processor is capable of changing FIDVID */
+ /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+ cpuid1 = cpuid(0x80000007);
+ if( (cpuid1.edx & 0x6) == 0x6 ) {
- enable_fid_change();
- enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
- init_fidvid_bsp(bsp_apicid);
+ /* Read FIDVID_STATUS */
+ msr=rdmsr(0xc0010042);
+ printk_debug("begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
- /* show final fid and vid */
- msr=rdmsr(0xc0010042);
- printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+ enable_fid_change();
+ enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
+ init_fidvid_bsp(bsp_apicid);
+ /* show final fid and vid */
+ msr=rdmsr(0xc0010042);
+ printk_debug("end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
+
+ } else {
+ printk_debug("Changing FIDVID not supported\n");
+ }
+
needs_reset = optimize_link_coherent_ht();
needs_reset |= optimize_link_incoherent_ht(sysinfo);
rs690_htinit();
Index: src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
===================================================================
--- src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c (revision 3850)
+++ src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c (working copy)
@@ -259,6 +259,7 @@
int needs_reset; int i;
unsigned bsp_apicid = 0;
+ struct cpuid_result cpuid1;
if (bist == 0) {
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
@@ -311,8 +312,13 @@
#endif
#if K8_SET_FIDVID == 1
+ /* Check to see if processor is capable of changing FIDVID */
+ /* otherwise it will throw a GP# when reading FIDVID_STATUS */
+ cpuid1 = cpuid(0x80000007);
+ if( (cpuid1.edx & 0x6) == 0x6 ) {
{
+ /* Read FIDVID_STATUS */
msr_t msr;
msr=rdmsr(0xc0010042);
print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
@@ -332,6 +338,11 @@
print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
}
+
+ } else {
+ print_debug("Changing FIDVID not supported\n");
+ }
+
#endif
#if 1
--
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