On 28.01.2009 05:53, Eric W. Biederman wrote: > Corey Osgood <[email protected]> writes: > > >> ??? >> I'm not seeing any code in v2 capable of calculating subtractive mtrrs, is it >> possibly in v1? Am I missing something? I'm only looking in mtrr.c. >> > > I haven't looked recently so it may be that someone took it for some > bizarre reason. But the code was there and it worked. Do we have a good > history > or has transitioning between a dozen version control systems messed that up? >
I looked at all changes since r2006 in src/cpu/x86/mtrr/ and src/cpu/amd/mtrr/ r3014 introduced CONFIG_VAR_MTRR_HOLE which needs to be enabled to use subtractive MTRR code for x86. Before that revision, that code was always enabled. However, I get the following boot log, so I assume subtractive setup works at least in some cases: Initializing CPU #0 CPU: vendor AMD device 50ff2 CPU: family 0f, model 5f, stepping 02 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 4096MB, type WB ADDRESS_MASK_HIGH=0xff Setting variable MTRR 1, base: 4096MB, range: 1024MB, type WB ADDRESS_MASK_HIGH=0xff Setting variable MTRR 2, base: 3072MB, range: 1024MB, type UC ADDRESS_MASK_HIGH=0xff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled CPU model AMD Athlon(tm) 64 Processor 3000+ Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
