On Tue, Jan 27, 2009 at 11:07 AM, Dan Lykowski <[email protected]> wrote: > Diff was being silly and I wanted to get the patch posted before I left work > for the day. I've cleaned up the patch and included it. > > I wasn't able to find where INTA was used so I used what the RPR lists as > default. INTG. After looking at the mptable, I agree INTA is the correct > answer. I've corrected it. I used dev_find_slot because I copied from the > SATA driver. I've added the comment just like the SATA driver has. I don't > know what the difference is, or why the SATA driver did this. > > The reordering was based on what order things happen in the BIOS Developers > guide, RPR, and SATA driver. I fixed the order of the devices that didn't > matter to clean up the change log. > 1. Enable the Chip > 2. Setup the SMBus registers > 3. Setup the Device Registers > 4. Look for Codec > 5. Init Codec > > The codec init was changed to match the description in the RRG pg 235. > Mem Reg: Base + 08h Bit 0. There were unneeded things happening. > So here is the second try. > > Thanks, > Dan Lykowski > > Signed-off-by: Dan Lykowski <[email protected]>
This looks good to me. The hda_init looks like it was writing to the wrong device for the interrupt line setup. It would be good if the the AMD guys or Carl-Daniel can test and ack it. Marc -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
