Hi Patrick, On 13.02.2009 13:02, Patrick Georgi wrote: > the attached patch changes the ASM part of AMD CAR to do the K8/Fam10h > decision at runtime, instead of compile time. > > Ideally, this is enough to allow a single coreboot image to run on a board > regardless of the CPU family. In practice, there might be more compile time > decisions in later code that weren't exposed due to the unusual way we used > the code. (Everything up to activating CAR is known to work, everything after > real_main is fair game) > Yet, the patch should solve one of the harder issues as after this, coreboot > is in C and in CAR mode, so there's plenty of space to keep a CPUID value > around. > > What this patch does: > 1. Enable SSE (to get some more registers to play with) > 2. Determine CPUID, and stash it in an XMM register, and reference > value for comparison in another XMM register > 3. Add a macro jmp_if_k8, which jumps if the CPU is K8 (using an SSE compare) > 4. Replace #if CAR_FAM10 sections with runtime checks using jmp_if_k8. > This is pretty mechanical work. The macro uses local labels (1: and 2:) to > prevent namespace issues > 5. At one time, CPU_ADDR_BITS is used to fill a register. This is replaced > with hardcoded values for both cases, and switched appropriately. > 6. Disable SSE > > Signed-off-by: Patrick Georgi <[email protected]>
This is absolutely awesome! Not only did you manage to keep the code readable, you also have kept the changes localized and really minimal. Although I had something similar (untested, unfinished) on disk, your solution is clearly the way to go. No doubt about that. I'd ack straight away, but there is one thing I couldn't figure out immediately from the code: Can the code handle Fam11h processors? AFAIK they have to be treated like Fam10h. (And I want to reread this beautiful patch again ;-) ) Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
