On 13.02.2009 14:01, Patrick Georgi wrote:
> Am Freitag 13 Februar 2009 13:42:15 schrieb Carl-Daniel Hailfinger:
>
>> This is absolutely awesome! Not only did you manage to keep the code
>> readable, you also have kept the changes localized and really minimal.
>> Although I had something similar (untested, unfinished) on disk, your
>> solution is clearly the way to go. No doubt about that.
>>
> Thank you!
>
>
>> I'd ack straight away, but there is one thing I couldn't figure out
>> immediately from the code: Can the code handle Fam11h processors? AFAIK
>> they have to be treated like Fam10h.
>>
> Right. A better way would be to compare against the K8 CPUID, and switch the
> jump direction in jmp_if_k8. That should be enough, until AMD decides to
> devise a new scheme for future CPU generations.
>
I created a patch against a tree with your original patch applied. It
should be able to handle all generations since the invention of CPUID
just fine. Fam11h and later are handled as well.
Signed-off-by: Carl-Daniel Hailfinger <[email protected]>
--- corebootv2/src/cpu/amd/car/cache_as_ram.inc (Arbeitskopie)
+++ corebootv2/src/cpu/amd/car/cache_as_ram.inc (working copy)
@@ -27,10 +27,10 @@
/* for CAR_FAM10 */
#define CacheSizeAPStack 0x400 /* 1K */
-#define jmp_if_k8(x) comisd %xmm1, %xmm2; jnz x
+#define jmp_if_k8(x) comisd %xmm1, %xmm2; jb x
#define CPUID_MASK 0x0ff00f00
-#define CPUID_MASK_FAM10 0x00100f00
+#define CPUID_VAL_FAM10_ROTATED 0x0f000010
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
@@ -60,9 +60,12 @@
cvtsi2sd %ebx, %xmm3
movl $0x01, %eax
cpuid
+ /* base family is bits 8..11, extended family is bits 20..27 */
andl $CPUID_MASK, %eax
+ /* reorder bits for easier comparison by value */
+ rol %eax, $16
cvtsi2sd %eax, %xmm1
- movl $CPUID_MASK_FAM10, %eax
+ movl $CPUID_VAL_FAM10_ROTATED, %eax
cvtsi2sd %eax, %xmm2
cvtsd2si %xmm3, %ebx
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
--- corebootv2/src/cpu/amd/car/cache_as_ram.inc (Arbeitskopie)
+++ corebootv2/src/cpu/amd/car/cache_as_ram.inc (working copy)
@@ -27,10 +27,10 @@
/* for CAR_FAM10 */
#define CacheSizeAPStack 0x400 /* 1K */
-#define jmp_if_k8(x) comisd %xmm1, %xmm2; jnz x
+#define jmp_if_k8(x) comisd %xmm1, %xmm2; jb x
#define CPUID_MASK 0x0ff00f00
-#define CPUID_MASK_FAM10 0x00100f00
+#define CPUID_VAL_FAM10_ROTATED 0x0f000010
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
@@ -60,9 +60,12 @@
cvtsi2sd %ebx, %xmm3
movl $0x01, %eax
cpuid
+ /* base family is bits 8..11, extended family is bits 20..27 */
andl $CPUID_MASK, %eax
+ /* reorder bits for easier comparison by value */
+ rol %eax, $16
cvtsi2sd %eax, %xmm1
- movl $CPUID_MASK_FAM10, %eax
+ movl $CPUID_VAL_FAM10_ROTATED, %eax
cvtsi2sd %eax, %xmm2
cvtsd2si %xmm3, %ebx
--
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