Peter,
I am stuck with the same error even after applying the new patch.
Here's the command output:
{-------------------
stress:/tmp # ./flashrom -m "portwell:ppap-2020vl" -E
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "VIA VT8237", enabling flash write... OK.
Found board "Portwell PPAP-2020VL", enabling flash write... OK.
Found chip "SST SST49LF004A/B" (512 KB) at physical address 0xfff80000.
Erasing flash chip... ERASE FAILED!
FAILED!
ERROR at 0x00000000: Expected=0xff, Read=0x49
-------------------
stress:/tmp # ./flashrom -m "portwell:ppap-2020vl" -w backup.bin
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "VIA VT8237", enabling flash write... OK.
Found board "Portwell PPAP-2020VL", enabling flash write... OK.
Found chip "SST SST49LF004A/B" (512 KB) at physical address 0xfff80000.
Flash image seems to be a legacy BIOS. Disabling checks.
ERASE FAILED!
-------------------}
Please guide me further.
Regards,
Vinod
Peter Stuge wrote:
Gah! Sorry. Here it is.
//Peter
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