On 03.04.2009 20:20, Joseph Smith wrote: > > On Fri, 03 Apr 2009 19:05:28 +0200, Carl-Daniel Hailfinger wrote: > >> This is a list of targets using ROMCC together with the CPU type used >> for ROMCC. >> >> > rca/rm4100 p3 > thomson/ip1000 p3 > Are my doings. I would love to see them using CAR instead of ROMCC, but I > wouldn't even know where to start.... >
Great. Will a bad reflash hurt you? What you need to try this one out: - a POST card or another way to fetch POST codes. - tell me whether POST works by default or you need special setup. - a will to try out v3 with some patches The idea is to test the v3 intel CAR code which has not been on real hardware yet, but it is a much cleaner and more readable implementation compared to v2. I'm hoping we don't need chipset specific stuff for POST to work. I need info on the cache size of your processor, though. Unreliable CAR is not nearly as much fun as reliable CAR. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
